High-speed Multifunction Boards
User Manual, Ver. 1.0, May 2015, PMH-029-10 Page 13
2.3
System Block Diagram
The following is the block diagram for the PCI-8620:
CLAMP
CLAMP
1MΩ
1MΩ
R
FB
R
FB
2
nd
Order LPF
T/H
Vin0~
Vin7
GND
ADC
&
Digital
Filter
4-ch Digital Output
(TTL Level)
2K-
Samples
FIFO
ADC
Controller
PCIe
Controller
DMA
Engine
MagicScan
Engine
FPGA
Host
PCIe X1
DO0~
DO3
PCIe-8620
4-ch Digital Input
(TTL Level)
DI0~
DI3
The following is the block diagram for the PCI-8622:
CLAMP
CLAMP
1MΩ
1MΩ
R
FB
R
FB
2
nd
Order LPF
T/H
Vin0~
Vin15
GND
ADC
&
Digital
Filter
12-ch Digital Output
(TTL Level)
2K-
Samples
FIFO
ADC
Controller
PCIe
Controller
DMA
Engine
MagicScan
Engine
FPGA
Host
PCIe X1
DO0~
DO11
PCIe-8622
12-ch Digital Input
(TTL Level)
DI0~
DI11
DAC
AO0
AO1
DAC