sthux
Store Halfword with Update Indexed
PPC440x5 CPU Core User’s Manual
Preliminary
Page 416 of 589
instrset.fm.
September 12, 2002
sthux
Store Halfword with Update Indexed
EA
←
(RA|0) + (RB)
MS(EA, 2)
←
(RS)
16:31
(RA)
←
EA
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 when the RA field is 0, and is the contents of register RA otherwise.
The least significant halfword of register RS is stored into the halfword at the EA.
The EA is placed into register RA.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• RA
Invalid Instruction Forms
• Reserved fields
• RA = 0
sthux
RS, RA, RB
31
RS
RA
RB
439
0
6
11
16
21
31
Содержание PPC440X5 CPU Core
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