Huawei MU509-65, Руководство по оборудованию

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HUAWEI MU509-65 HSDPA LGA Module
Hardware Guide
Description of the Application Interfaces
Issue 01 (2016-04-08)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
34
Figure 3-17 Connections of the WAKEUP_IN and WAKEUP_OUT pins
VCC_EXT
VCC_EXT2
WAKEUP_IN
WAKEUP_OUT
b
b
c
c
e
e
2.2 kΩ
2.2 kΩ
2.2 kΩ
2.2 kΩ
1 nF
1 nF
Module
(DCE)
Micro Control
(DTE)
3.5 UART Interface
3.5.1 Overview
The MU509-65 module provides the UART (8-wire UART) interface for one
asynchronous communication channel. As the UART interface supports signal control
through standard modem handshake, AT commands are entered and serial
communication is performed through the UART interface. The UART has the following
features:

Full-duplex

7-bit or 8-bit data

1-bit or 2-bit stop bit

Odd parity check, even parity check, or non-check

Baud rate clock generated by the system clock

Direct memory access (DMA) transmission

Baud rate ranging from 600 bit/s to 230400 bit/s (115200 bit/s by default)
Table 3-9 lists the UART interface signals.
Table 3-9 UART interface signals
Pin
No.
Pin Name
Pad
Type
Description Parameter Min. (V) Typ. (V) Max. (V)
76 UART_TX O
UART transmit
output
V
OH
2.15 - 2.6
V
OL
0 - 0.45
78 UART_RX I
UART receive data
input V
IH
1.69 - 2.9
V
IL
–0.3
- 0.91