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Waveform Menu

Captured data is displayed in the Waveform menu as shown below.

State-Per-Clock
Mode

State-Per-Clock mode clocks the logic analyzer on every K clock rising
and falling edge regardless of whether or not valid transfers occur;
therefore, every state which crosses the target system microprocessor’s
bus is captured. This allows the logic analyzer to capture wait states
and idle states, in addition to valid address states and data states.

To select State-Per-Clock mode, install the jumper on J2, and change
the Clock field to K . Note that inverse assembly is not supported in
State-Per-Clock mode.

Figure 2-15. Waveforms Display

Analyzing the Intel 80386DX/DXL

HP E2444A

2-22

80386DX/DXL Preprocessor Interface

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Содержание E2444A

Страница 1: ...ble You will find any other available product information on the Agilent Test Measurement website www tm agilent com HP References in this Manual This manual may contain references to HP or Hewlett Packard Please note that Hewlett Packard s former test and measurement semiconductor products and chemical analysis businesses are now part of Agilent Technologies We have made no changes to this manual...

Страница 2: ...ic analyzer are you using Type 6 What do you like most about the preprocessor interface 7 What would you like to see changed or improved 8 Which sections of the manual s have you used Installation Overview Step By Step Procedures Specifications Schematics and Parts List 9 Please rate the manual s on the following 4 Excellent 3 Good 2 Adequate 1 Poor Breadth and depth of information Ability to easi...

Страница 3: ...the HP 1650A HP 1650B HP 1652B HP 1660A 61A HP 16510A HP 16510B HP 16511B HP 16540 16541A D HP 16542A and HP 16550A Logic Analyzers Copyright Hewlett Packard Company 1993 Manual Part Number E2444 90902 Microfiche Part Number E2444 90802 Printed in U S A April 1993 ...

Страница 4: ...rrections may be done without accompanying product changes Therefore do not expect a one to one correspondence between product updates and manual updates Edition 1 April 1993 E2444 90902 List of Effective Pages The List of Effective Pages gives the date of the current edition and of any pages changed in updates to that edition Within the manual any page changed since the last edition is indicated ...

Страница 5: ...vice travel areas warranty service will be performed at Buyer s facility only upon Hewlett Packard s prior agreement and Buyer shall pay Hewlett Packard s round trip travel expenses For products returned to Hewlett Packard for warranty service the Buyer shall prepay shipping charges to Hewlett Packard and Hewlett Packard shall pay shipping charges to return the product to the Buyer However the Buy...

Страница 6: ... ON CONTRACT TORT OR ANY OTHER LEGAL THEORY Assistance Product maintenance agreements and other customer assistance agreements are available for Hewlett Packard products For assistance contact your nearest Hewlett Packard Sales and Service Office Certification Hewlett Packard Company certifies that this product met its published specifications at the time of shipment from the factory Hewlett Packa...

Страница 7: ...the HP E2444A 1 7 Power Up Down Sequence 1 7 Setting Up the Analyzer from the Disk 1 11 Chapter 2 Analyzing the Intel 80386DX DXL Introduction 2 1 Format Specification 2 1 Symbols 2 4 Listing Menu 2 8 The 80386DX DXL Inverse Assemblers 2 10 Synchronizing the Inverse Assemblers 2 11 Interpreting Data 2 13 Error Messages 2 15 Instruction Decoding 2 16 Coprocessor Support 2 16 Additional Information ...

Страница 8: ...lock A 1 Slow Clock A 2 No Configuration File Loaded A 2 Selected File is Incompatible A 2 Inverse Assembler Not Found A 3 No Inverse Assembly A 3 Incorrect Inverse Assembly A 3 No Activity on Activity Indicators A 3 Capacitive Loading A 3 State Clock Violates Overdrive Specification A 4 Unwanted Triggers A 4 Waiting for Trigger A 4 Intermittent Data Errors A 4 Bent Pins A 4 Time from Arm Greater ...

Страница 9: ...in 80386DX DXL assembly language mnemonics Logic Analyzer Software Requirement The HP E2444A Preprocessor Interface requires HP 16500A system and module software version V05 03 or higher HP 16540 16541A D HP 16542A and HP 16550A Logic Analyzers For the HP 16500B mainframe system and module software version V01 00 or higher is required For the HP 1660A 61A Logic Analyzers software version V01 00 or...

Страница 10: ...analysis and 80 channels of 100 MHz timing analysis HP 1660A 61A The HP 1660A 61A Logic Analyzers provide 4 k of memory depth with 136 channels HP 1660A or 102 channels HP 1661A of 100 MHz state analysis or 250 MHz timing analysis These logic analyzers also support various combinations of mixed state timing analysis HP 16540A D with one or two HP 16541A D Expansion Cards This logic analyzer combin...

Страница 11: ...nterface for state and timing analysis with the supported logic analyzers Chapter 2 provides reference information on the format specification and symbols configured by the HP E2444A software It also provides information about the inverse assembler and status encoding Chapter 3 contains additional reference information including the characteristics and signal mapping for the HP E2444A Preprocessor...

Страница 12: ...configuration software on the flexible disk sets up the format specification of the logic analyzer for compatibility with the 80386DX DXL microprocessor It also loads the inverse assembler routine for obtaining displays of 80386DX DXL data in assembly language mnemonics The preprocessor interface can be used for timing analysis as well as state analysis The State Timing jumper on the preprocessor ...

Страница 13: ...te gold plated pins of the assembly from damage due to impact When you re not using the preprocessor interface protect the socket assembly pins from damage by covering them with the foam or plastic pin protector Equipment Required The minimum hardware required for analysis of an 80386DX DXL target system consists of the following equipment An HP 1650A HP 1650B HP 1652B HP 1660A 61A HP 16510A HP 16...

Страница 14: ...ng connected or disconnected 1 Ensure the State Timing jumper is configured appropriately for state or timing analysis see page 1 4 2 Connect the 80386DX DXL preprocessor interface to the target system see page 1 6 3 Plug the logic analyzer cables into the preprocessor interface pods as listed in table 1 1 see page 1 7 4 Load the logic analyzer configuration and inverse assembler for the specified...

Страница 15: ...umper is removed the buffers behave as latches which capture and hold data based on the assertion of ADS and READY A31 2 and D31 0 are latched address and data when the jumper is open In State Per Clock mode it is best to close the jumper J2 so that the buffers are flow through and all signals sampled are relative to each other If you use State Per Clock mode with J2 open valid address and data ap...

Страница 16: ...Figure 1 1 HP E2444A Preprocessor Interface HP E2444A Setting Up the HP E2444A 80386DX DXL Preprocessor Interface 1 5 ...

Страница 17: ...that all microprocessor pins are making contact 2 Plug the preprocessor interface connector into the microprocessor socket on the target system Note If the preprocessor interface connector interferes with components of the target system or if a higher profile is required additional plastic pin protectors extenders can be added Plastic pin protectors extenders can be ordered from Hewlett Packard us...

Страница 18: ...ative locations for the logic analyzer cards Power Up Down Sequence When powering up the logic analyzer must be powered up first and then the target system The logic analyzer provides the power to the active circuits on the preprocessor interface unpowered circuits may cause improper operation of the target system When powering down the target system should be powered down first and then the logic...

Страница 19: ...ATA clk HP 16511B Upper Master Card PI386_02 HP 16511B Lower Expander Card P5 STAT P4 ADDR P3 ADDR P2 DATA P1 DATA clk HP 16541A D Expansion Card 1 PI386_03 P5 STAT P4 ADDR P3 ADDR HP 16540A D Master Card P1 DATA clk HP 16541A D Expansion Card 2 P2 DATA HP 16550A HP 1661A PI386_04 P5 STAT P4 ADDR P3 ADDR P2 DATA P1 DATA clk HP 1660A PI386_04 Pod 7 P5 STAT P4 ADDR P3 ADDR P2 DATA P1 DATA clk Settin...

Страница 20: ...Pod 6 Pod 5 Pod 4 Pod 3 Pod 2 Pod 1 HP 16542A Expansion Card 1 PI386_03 P5 STAT HP 16542A Expansion Card 2 P4 ADDR HP 16542A Master Card P1 DATA clk HP 16542A Expansion Card 3 P3 ADDR HP 16542A Expansion Card 4 P2 DATA HP E2444A Setting Up the HP E2444A 80386DX DXL Preprocessor Interface 1 9 ...

Страница 21: ...Figure 1 2 Logic Analyzer Card Locations relative locations actual slots used may vary Setting Up the HP E2444A HP E2444A 1 10 80386DX DXL Preprocessor Interface ...

Страница 22: ...disk into the directory For step two select Hard Disk 2 Select one of the following menus For the HP 1650 series logic analyzers select the I O Disk Operations menu For the HP 16500 series and HP 1660 series logic analyzers select the System Front Disk menu 3 Configure the menu to Load the analyzer configuration from disk 4 For HP 16500 series and HP 1660 series logic analyzers select the appropri...

Страница 23: ...ssembler contains enhanced features which use the increased capabilities of some of the logic analyzers It works with the HP 16540 16541A D and HP 16550A Logic Analyzers in an HP 16500B mainframe and with the HP 1660A 61A Logic Analyzers with software version V02 00 or higher The configuration software checks the logic analyzer system configuration during the load process and automatically loads t...

Страница 24: ...e are some slight differences in the displays according to which logic analyzer you are using For example some logic analyzers do not have a Clock Period field Refer to your logic analyzer manual to see which fields and displays are available Table 3 1 in chapter 3 lists the 80386DX DXL signals for the HP E2444A Preprocessor Interface and their corresponding lines to the logic analyzers Note For t...

Страница 25: ... Label field and rotate the knob on the front panel clockwise Figure 2 3 shows some of the lower labels Figure 2 1 80386 Format Specification Pods 1 3 Figure 2 2 80386 Format Specification Pods 5 and 6 Analyzing the Intel 80386DX DXL HP E2444A 2 2 80386DX DXL Preprocessor Interface ...

Страница 26: ...Figure 2 3 80386 Format Specification Pods 3 5 lower portion of display HP E2444A Analyzing the Intel 80386DX DXL 80386DX DXL Preprocessor Interface 2 3 ...

Страница 27: ...it data bus during specific transfers The SIZE label which indicates the size of the transfer on the data bus 16 bit or 32 bit transfer The HALT label which differentiates between a HALT cycle caused by executing the HALT instruction and a shutdown caused by protection fault while attempting to process a double fault Figures 2 4 and 2 5 show the symbol tables for the STAT and BE labels Table 2 1 l...

Страница 28: ...control cycle 1 M IO Signal is high for memory and low for I O 2 W R Signal is high for a write cycle and low for a read 3 HLDA Signal goes high when the microprocessor has relinquished control of the bus Figure 2 5 Symbol Table for the BE Label HP E2444A Analyzing the Intel 80386DX DXL 80386DX DXL Preprocessor Interface 2 5 ...

Страница 29: ...that the system is requesting the next address from the microprocessor 10 LOCK When this signal is low it indicates that the microprocessor has the bus locked to prevent interruption by other bus devices 11 ERROR When this signal is low it indicates that the previous coprocessor instruction generated a coprocessor error 12 PEREQ When this signal is high it requests that the microprocessor perform ...

Страница 30: ...x x 0 0 0 0 x x x x Higher 3 Bytes x x x 0 0 0 1 x x x x High Word x x x 0 0 1 1 x x x x Byte 3 x x x 0 1 1 1 x x x x Lower 3 Bytes x x x 1 0 0 0 x x x x Middle Word x x x 1 0 0 1 x x x x Byte 2 x x x 1 0 1 1 x x x x Low Word x x x 1 1 0 0 x x x x Byte 1 x x x 1 1 0 1 x x x x Byte 0 x x x 1 1 1 0 x x x x Size of Transfer 16 bit Transfer x x 0 x x x x x x x x 32 bit Transfer x x 1 x x x x x x x x N...

Страница 31: ...the mnemonic output closely resembles the actual assembly source code Note If your state trace doesn t appear to be correct capturing the same RAM address twice for example make sure the state timing jumper J2 is open If J2 is closed remove the jumper and run the trace again Figure 2 6 State Listing IA386 Inverse Assembler Analyzing the Intel 80386DX DXL HP E2444A 2 8 80386DX DXL Preprocessor Inte...

Страница 32: ...ic analyzers see page 1 12 The unexecuted prefetches have been suppressed A comparison of figures 2 6 and 2 7 shows the display filtering Figure 2 7 State Listing IA386E Inverse Assembler Unexecuted Prefetches Suppressed HP E2444A Analyzing the Intel 80386DX DXL 80386DX DXL Preprocessor Interface 2 9 ...

Страница 33: ...of the bytes fetched is the first byte of a code fetch You must point to the first byte of an instruction fetch Once synchronized the inverse assemblers will disassemble from this state through the end of the screen In addition the 80386DX DXL microprocessor can execute two types of object code The 80386DX DXL can execute the 80386DX DXL instruction set 32 bit and it can also execute object code f...

Страница 34: ...ptured state contains the first byte of the code fetch and what kind of object code is being executed by the microprocessor Size 16 or 32 for Intel s 16 or 32 bit microprocessor families With the IA386E inverse assembler also select Align The listing will inverse assemble from the top line down Any data before this screen is left unchanged Rolling the screen up will inverse assemble the lines as t...

Страница 35: ... 8 Inverse Assembler Byte Selection IA386 Inverse Assembler Figure 2 9 Inverse Assembler Byte Selection IA386E Inverse Assembler Analyzing the Intel 80386DX DXL HP E2444A 2 12 80386DX DXL Preprocessor Interface ...

Страница 36: ...Line number 0015 displays two instructions from a double word Since instructions may begin in any byte position the last bytes of a multiple byte instruction may extend into the lower bytes of the next double word fetched In this instance the next sequential instruction begins in the next higher byte of the next double word after the previous instruction and operands When interpreting a given stat...

Страница 37: ...incorrectly The 80386DX DXL microprocessor can perform byte word and three byte transfers as well as double word transfers between microprocessor registers and memory Byte transfers can occur in any byte on the 32 bit data bus Word and three byte transfers can occur across any contiguous set of bytes that will hold the transfer The bytes that are valid in a transfer are indicated by the microproce...

Страница 38: ...ssages Any of the following list of error messages may appear during analysis of your target software Included with each message is a brief explanation Illegal Task Request Displayed if the inverse assembler is used with an instrument other than the supported logic analyzers Fatal Data Error Displayed if the trace memory could not be read properly on entry into the inverse assembler Invalid Status...

Страница 39: ...gering from unused prefetches is to add 10 hex to the trigger address This trigger condition will only be satisfied if the branch is not taken In some cases it is impossible to determine from bus activity whether or not a branch is taken or a prefetch is executed In these cases the inverse assembler marks the disassembled line with the prefix The logic analyzer is clocked once each bus cycle The p...

Страница 40: ...A such as DMA cycles will not be captured by the logic analyzer Note The ADS and READY lines must be operating in normal 80386DX DXL bus cycles when the HLDA line is disabled If these lines are not present during the HLDA hold acknowledge period the preprocessor interface will not remain in step with following bus cycles This will result in incorrect capturing of data Figure 2 10 80386 2 Byte Mode...

Страница 41: ...assembler see previous sections The IA386E Inverse Assembly Options menu contains three functions display filtering with Show Suppress selections Code Synchronization and IDT description entry see figure 2 11 The following sections describe these functions Note If the X or O pattern markers are turned on and the designated pattern is found in a state that has been Suppressed with display filtering...

Страница 42: ...ysis of I O accesses Code Synchronization The Code Synchronization enables the inverse assembler to resynchronize with the microprocessor code In some cases the prefetch marking algorithm in the inverse assembler may lose synchronization and unused prefetches or executed instructions may be incorrectly marked If any of the Code Reads are suppressed this could cause some executed instructions to be...

Страница 43: ...uration menu of the logic analyzer 3 Select the Type field for the 80386DX DXL analyzer and select Timing see figure 2 12 Note BS16 and RESET are not available for timing analysis BS16 appears on the format specification but is not accurate for timing analysis because it is delayed by an edge triggered latch on the preprocessor interface board Figure 2 12 Setting Machine 1 to Timing Analyzing the ...

Страница 44: ...figures 2 13 and 2 14 Additional labels which are listed off screen To view these signals select the Label field and rotate the knob on the front panel clockwise Figure 2 13 Timing Format Specification Pods 1 3 Figure 2 14 Timing Format Specification Pods 3 5 HP E2444A Analyzing the Intel 80386DX DXL 80386DX DXL Preprocessor Interface 2 21 ...

Страница 45: ...te which crosses the target system microprocessor s bus is captured This allows the logic analyzer to capture wait states and idle states in addition to valid address states and data states To select State Per Clock mode install the jumper on J2 and change the Clock field to K Note that inverse assembly is not supported in State Per Clock mode Figure 2 15 Waveforms Display Analyzing the Intel 8038...

Страница 46: ...ackage Supported 132 pin PGA Maximum Clock Speed 40 MHz clock output CLK 80 MHz clock input CLK2 State Speed Four CLK2 cycles per bus cycle Maximum Analyzer Clock Speed 20 MHz state speed with CLK2 at 80 MHz Signal Line Loading Approximately 15 pF on ADS and READY Approximately 8 pF on all other lines Microprocessor Operations Displayed Memory Read Write I O Read Write Opcode Fetch Interrupt Ackno...

Страница 47: ...Description The primary function of the HP E2444A Preprocessor Interface is to connect the target microprocessor to the logic analyzer and to perform the interface logic required to identify address pipelining and 16 bit or 32 bit cycles The HP E2444A Preprocessor Interface performs this primary function by Latching and buffering the address status and data bus of the 80386DX DXL microprocessor so...

Страница 48: ...ched during the first CLK2 cycle after READY is detected low Data is latched at the end of the 80386DX DXL cycle The end of the bus cycle is defined as the rising edge of CLK2 when CLK is high and READY is low The clock for the logic analyzer is generated approximately 8 ns after the end of the cycle The J clock for latching information into the logic analyzer is generated by the PAL on the HP E24...

Страница 49: ...Figure 3 1 HP E2444A Block Diagram General Information HP E2444A 3 4 80386DX DXL Preprocessor Interface ...

Страница 50: ...Figure 3 2 HP E2444A Timing Diagram HP E2444A General Information 80386DX DXL Preprocessor Interface 3 5 ...

Страница 51: ...ions The HP E2444A Preprocessor Interface places digital circuitry between the microprocessor pin and the logic analyzer input Table 3 1 80386DX DXL Signal List Preprocessor Pod Logic Analyzer Probe 80386DX DXL Pin Number Pin Mnemonic Label P5 P5 P5 P5 P5 P5 P5 P5 P5 P5 P5 P5 P5 P5 P5 P5 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 B10 A11 A12 M14 E12 C13 B13 A13 C14 D13 C10 A8 C8 B9 E14 G13 W R D C M IO...

Страница 52: ... C4 A3 B3 B2 C3 C2 C1 D3 D2 D1 E3 E2 E1 F1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR P4 P4 P4 P4 P4 P4 P4 P4 0 1 2 3 4 5 6 7 G1 H1 H2 H3 J1 K1 K2 L1 A16 A17 A18 A19 A20 A21 A22 A23 ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR Derived from BE0 through BE3 HP E2444A General Information 80386DX DXL Preprocessor Int...

Страница 53: ... A29 A30 A31 ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 P1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 J CLK H12 H13 H14 J14 K14 K13 L14 K12 L13 N14 M12 N13 N12 P13 P12 M11 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA General Information HP E2444A 3 8 80386DX DXL Preproce...

Страница 54: ... P2 P2 P2 P2 P2 P2 P2 P2 P2 P2 P2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 K CLK N11 N10 P11 P10 M9 N9 P9 N8 P7 N6 P5 N5 M6 P4 P3 M5 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA HP E2444A General Information 80386DX DXL Preprocessor Interface 3 9 ...

Страница 55: ...u to exchange a faulty assembly with one that has been repaired calibrated and performance verified by the factory The cost is significantly less than that of a new assembly Table 3 2 Replaceable Parts HP Part Number Description E2444 69501 E2444 68702 1200 1605 1252 3743 Exchange Board Cable Assembly Software Disk Pouch Pin Protector Jumper The Pin Protector IC socket is also available from McKen...

Страница 56: ...Figure 3 3 HP E2444A Dimensions inches mm HP E2444A General Information 80386DX DXL Preprocessor Interface 3 11 ...

Страница 57: ...eprocessor interface are properly rotated and aligned Verify that the microprocessor and the preprocessor interface are securely inserted into their respective sockets Verify that the logic analyzer cables are in the proper sockets of the preprocessor interface and firmly inserted Reduce the number of extender sockets see also Capacitive Loading Slow or Missing Clock This error message might occur...

Страница 58: ...alyzer If 5 V is observed across these pins and you feel confident that the 5 V is getting to the preprocessor interface contact your nearest Hewlett Packard Sales Service Office for information on servicing the board No Configuration File Loaded Verify that the appropriate module has been selected from the Load module from File filename in the HP 16500A B disk operation menu Selecting Load All wi...

Страница 59: ...ed you should still get inverse assembly but it may be incorrect since some of the execution trace was not visible to the logic analyzer Verify that storage qualification has not excluded storage of all the needed opcodes and operands No Activity on Activity Indicators On the HP 1650A HP 1651A and HP 16510A Logic Analyzers if there is no activity the fuse which allows power to the preprocessor int...

Страница 60: ...hes Add the prefetch queue depth to the trigger address to avoid this problem Waiting for Trigger If a trigger pattern is specified this message indicates that the specified trigger pattern did not occur Verify that the triggering pattern is correctly set If a don t care trigger condition is set this message indicates For an HP 16511B Logic Analyzer only one of the two cards is receiving its state...

Страница 61: ...m multiple modules on a single screen No Setup Hold Field on Format Screen The HP 16540 16541A D or HP 16542A Logic Analyzer cards are not calibrated Refer to your logic analyzer reference manual for procedures to calibrate the cards Default Calibration Factors Loaded 16540 41 42 The default calibration file for the logic analyzer was loaded The logic analyzer must be calibrated when using HP 1654...

Страница 62: ...ze eingehalten werden Manufacturer s declaration This is to certify that this product HP 1650A B andd HP 1651A B meets the radio frequency interference requirements of directive 1046 84 The German Bundespost has been notified that this equipment was put into circulation and was granted the right to check the product type for compliance with these requirements Additional Information for Test and Me...

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