The Standard Event
Status Enable Register
The Standard Event Status Enable Register specifies which bits in the
Standard Event Status Register can generate a summary bit which is
subsequently used to generate a service request. The AFG logically ANDs
the bits in the Event Register with bits in the Enable Register, and ORs the
results to obtain a summary bit.
The bits in the Enable Register that are to be ANDed with bits in the Event
Register are specified (unmasked) with the command:
*ESE <
unmask
>
<
unmask
>
is the decimal, hexadecimal (#H), octal (#Q), or binary (#B)
value of the Enable Register bit to be unmasked. (Bits 7, 5, 4, 3, 2, 0 have
corresponding decimal values of 128, 32, 16, 8, 4, 1.)
All unmasked bits in the Enable Register can be determined with the
command:
*ESE?
The Standard Event Status Enable Register is cleared at power-on, or with
an
<
unmask
>
value of 0.
The Status Byte
Status Group
The registers in the Status Byte Status Group enable conditions monitored
by the other status groups to generate a service request.
The Status Byte
Register
The Status Byte Register contains the summary bits of the Questionable
Signal Status Group (
QUES
), the Operation Status Group (
OPER
), and the
Standard Event Status Group (
ESB
). The register also contains the message
available bit (
MAV
) and the service request bit (
RQS
).
7
6
5
4
3
2
1
0
OPER
RQS
ESB
MAV
QUES
unused
Questionable Signal Summary Bit (QUES):
Bit 3 is set (1) when a
condition monitored by the Questionable Signal Status Group is present,
when the appropriate bit is latched into the group’s Event Register, and
when the bit is unmasked by the group’s Enable Register.
Message Available Bit (MAV):
Bit 4 is set (1) when data, such as a query
response, is in the AFG’s output queue.
Standard Event Summary Bit (ESB):
Bit 5 is set (1) when a condition
monitored by the Standard Event Status Group is present and the
appropriate bit is set in the group’s Event Register, and when the bit is
unmasked by the group’s Enable Register.
Service Request Bit (RQS):
Bit 6 is set (1) when any other bit in the Status
Byte Register is set.
Chapter 8
HP E1340A AFG Status 208
Содержание E1340A
Страница 12: ...Notes 12 HP E1340A Arbitrary Function Generator Module User s Manual ...
Страница 14: ...14 HP E1340A Arbitrary Function Generator Module User s Manual ...
Страница 42: ...Chapter 2 Generating Standard Waveforms with the HP E1340A 42 ...
Страница 54: ...Chapter 2 Generating Standard Waveforms with the HP E1340A 54 ...
Страница 57: ...Figure 3 1 Generating Arbitrary Waveforms 57 Generating Arbitrary Waveforms with the HP E1340A Chapter 3 ...
Страница 58: ...Chapter 3 Generating Arbitrary Waveforms with the HP E1340A 58 ...
Страница 84: ...Chapter 4 HP E1340A Sweeping and Frequency Shift Keying 84 ...
Страница 130: ...Chapter 6 HP E1340A High Speed Operation 130 ...
Страница 202: ...202 HP E1340A SCPI Conformance Information Chapter 7 ...
Страница 204: ...Figure 8 1 HP E1340A Status Groups and Associated Registers Chapter 8 HP E1340A AFG Status 204 ...
Страница 218: ...218 HP E1340A Specifications Appendix A ...
Страница 284: ...284 HP E1340A Register Based Programming Appendix C ...
Страница 295: ...Index HP E1340A Arbitrary Function Generator User s Manual 295 ...