The Status Register
The flow and control of register-based programs are determined by the
Status Register. This register is continually monitored to determine when to
send a command, when to send a parameter, and when data is available.
Address
15 - 8
7
6
5
4
3
2
1
0
base + 04
16
FF16
DONE
1
Burst
Status
0
Pass/
SysFail
Pass/Sys
Fail
Resp
Buffer
Full
Cmd
Buffer
empty
DONE. A zero (0) in bit 7 indicates that the operation performed by the
current command has finished. Bit 7 is set to one (1) when a command is
received and is being processed.
The validity of this bit is determined by bit 0. See “ Status Bit Precedence”
for more information.
Burst Status. A zero (0) in bit 5 indicates the burst mode is set and a burst
is in progress. A one (1) indicates the burst mode is set and the burst is
complete. The bit is undefined if the burst mode is not set.
Pass/SysFail. A zero (0) in bit 3 indicates the AFG is executing a reset, or
is executing or has failed its self-test. A one (1) indicates the reset is
finished or the self-test passed.
Bit 2 performs the same function.
Response Buffer Full. A one (1) in bit 1 indicates data returned by a query
is in the Query Response Register. The bit is cleared (0) when the response
is read from the register.
Command Buffer Empty. A one (1) in bit 0 indicates a command or
parameter can be written to the Command or Parameter Register. The bit is
cleared (0) when the command or parameter is received. Bit 0 also
determines the validity of bit 7. See “Status Bit Precedence” for more
information.
Status Bit Precedence
In addition to the conditions the bits monitor, certain status bits indicate the
validity of other bits in the Status Register. This solves race situations
between selected bits.
When bit 0 is zero (0), bit 7 is invalid. This allows the AFG to set bit 7
(set it to one (1)) to indicate that a command or parameter is being
processed. When Bit 7 is zero (0), bit 1 is invalid. This allows the AFG
time to set those bits to the correct states based on the conditions they
represent.
236 HP E1340A Register-Based Programming
Appendix C
Содержание E1340A
Страница 12: ...Notes 12 HP E1340A Arbitrary Function Generator Module User s Manual ...
Страница 14: ...14 HP E1340A Arbitrary Function Generator Module User s Manual ...
Страница 42: ...Chapter 2 Generating Standard Waveforms with the HP E1340A 42 ...
Страница 54: ...Chapter 2 Generating Standard Waveforms with the HP E1340A 54 ...
Страница 57: ...Figure 3 1 Generating Arbitrary Waveforms 57 Generating Arbitrary Waveforms with the HP E1340A Chapter 3 ...
Страница 58: ...Chapter 3 Generating Arbitrary Waveforms with the HP E1340A 58 ...
Страница 84: ...Chapter 4 HP E1340A Sweeping and Frequency Shift Keying 84 ...
Страница 130: ...Chapter 6 HP E1340A High Speed Operation 130 ...
Страница 202: ...202 HP E1340A SCPI Conformance Information Chapter 7 ...
Страница 204: ...Figure 8 1 HP E1340A Status Groups and Associated Registers Chapter 8 HP E1340A AFG Status 204 ...
Страница 218: ...218 HP E1340A Specifications Appendix A ...
Страница 284: ...284 HP E1340A Register Based Programming Appendix C ...
Страница 295: ...Index HP E1340A Arbitrary Function Generator User s Manual 295 ...