HP 85662A, Руководство по устранению неисправностей и ремонту

Страница: 184 / 594

SAMPLE MODE HOLD MODE
Figure 2. Sample and Hold Modes, Simplified Schematic
X Integrator
C26, and Q5 form an “integrate and hold” circuit whose output is the X display position.
During the setup period, Q5 is open, leaving only and C26 holding the present value of
X. During the drawing period, Q5 is closed and the constant AX value from the Sample
and Hold circuit causes a constant current (proportional to AX) to flow through C26. This
constant current through C26 causes the output of to change linearly from the value (Xi)
at the last setup period toward a new value + = + AX. When the drawing period
ends, Q5 opens and the circuit returns to the hold mode, this time with output at the new X
position, The process of current flow through C26 is equivalent to integrating AX over the
drawing period.
The drawing period may last for 4 (short line) or 19 (long line). The hold period lasts
for 1 When the Line Generator is drawing a long line (19 switch is open and the
current through C26 is determined by R15. When the Line Generator is drawing a short line
(4
switch is closed and the current through C26 is determined by in parallel
with R7, R18. In either case, the current must be precisely set so that the X position will
become +
+ AX at the end of the drawing period. In the long line mode, XLL
potentiometer R6 of the Summing Amplifier is adjusted to get accurate line positioning. For
accuracy in the short line mode, XSL potentiometer R18 must be properly adjusted.
Diodes CR22 and CR23 keep the source of Q5 within 0.7 V of ground during the hold mode.
Capacitors C43 and C27 and signal LINTG compensate for gate feedthrough on Q5. R16,
C29, and C28 provide frequency compensation for
3