Log Offset Current Source
The Log Offset Current Source simulates log gain for instrument reference levels below
-60
This is achieved by offsetting the 0 V to 1 V video input signal by driving current
through the source resistance R16. This current is changed by supplying different currents
into the emitter of Q13, the transistor current source. Currents are controlled by switching
transistors
and Q12. For example, when switch Q12 is turned on, the transistor
saturates and a current flows through R5 into the emitter of Q13. This emitter current (set by
the voltage drop across R5) is closely equal to the collector current through Q12. The voltage
drop across R5 can be changed by varying LG OS potentiometer R2, since U6 pin 3 and the
emitter of
are at the same voltage. This is true because U6 is a voltage follower with
unity gain. Once R2 is set, the accuracy of R5, R7, and determines the relative accuracy
of the offsets, 0.1 V, 0.2 V, 0.2 V (10
20
20
Power Supplies
diode VR2 is used to provide the -8.8 V supply, which is used in the Log Expand
circuit with the FS adjustment R36.
Decode Logic
The Decode Logic circuit performs additional decoding on output lines from IF Control
VBWA, VBWB, VBWC, and VBWD are decoded by U8, a l-of-8 decoder, and inverted by
to drive one of the seven capacitors used in the Video Filter.
decodes A LOG and B
LOG and drives the switches that vary the attenuator in the Log Expand circuit.
Recorder Output
The Recorder Output circuit provides outputs for an X-Y plotter. Also provided are outputs
for calibrating lower left (LL) and upper right (UR). Calibration outputs and signal outputs
are routed through switch U4. A control line, REC CAL, from IF Control
controls the
state of the U4 switches. When REC CAL is high, the video output through U3 and AUX
SWEEP have closed paths through the switch to provide VIDEO and SWEEP outputs to the
rear panel. When the REC CAL is low, a closed path through the switch exists between the
calibration voltages and the VIDEO and SWEEP outputs. Control line REC ZERO causes
the FS or ZERO voltage to appear across the R50, R55,
divider stick. When in LL, REC
ZERO is low and the switch inputs are pulled to about 0 V. When REC ZERO is high, its
open collector output will be set to the voltage determined by the divider stick:
V for
out, and V for out.
2
Содержание 85662A
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