HORNER HE-XP7E0, Руководство пользователя

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MAN1106-07-EN_XL+_UserManual
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9.5.4 High Speed Counter Match
When either Q1 or Q2 is configured for HSC Output operation, their output state is based on a
comparison between the counter accumulator and match registers. See details above in the
high-speed input section.
9.5.5 Stepper Function
The XL+ supports two stepper functions, one on each high-speed output.
The Stepper requires five parameters (%AQs) to be set for operation. These parameters may
be set at run-
time but are ‘latched’ when the stepper is commanded to start:
Start Frequency
(pulses per
second)
Sets the frequency for the first cycle during the acceleration phase
and the frequency of the last cycle during the deceleration phase.
When an acceleration or deceleration count is specified, the Start
Frequency must be greater than 0 and must not exceed the run
frequency or an error is generated.
Run Frequency
(pulses per
second)
Sets the frequency for the last cycle during the acceleration phase, the
consistent frequency during the run phase, and the frequency of the
first cycle during the deceleration mode. The Run Frequency must be
greater than 0 and must not exceed 5000Hz (standard), 400,000Hz
(HE-XHSQ), or 1.0MHz (HE-XHSQ-5)
Acceleration
Count
Sets the number of cycles to occur within the acceleration phase. The
frequency of the cycles within this mode will vary linearly between the
specified Start and Run frequency. The Accel count must not equal 1 or
an error is generated. Setting this value to zero disables this phase.
Run Count
Sets the number of cycles to occur within the run phase. The
frequency of the cycles within this mode is constant at the specified
Run frequency. The Run count may be any value. Setting this value to
zero disables this phase.
Deceleration
Count
Sets the number of cycles to occur within the deceleration phase. The
frequency of the cycles within this phase will vary linearly between the
specified Run and Stop frequency. The Decel count must not equal 1 or
an error is generated. Setting this value to zero disables this phase.