Hitachi SH7095, Руководство пользователя по оборудованию

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Table 15.5 Control Signal Timing (Conditions: V
CC
= 5.0 V ±10%, Ta = -20 to +75°C)
(cont)
Item Symbol Min Max Unit Figure
BREQ delay time 1 (PLL on) t
BRQD1
— 1/2 tcyc +18 ns 15.12
BACK setup time 1 (PLL on) t
BAKS1
1/2 tcyc + 9 — ns
BACK hold time 1 (PLL on) t
BAKH1
9 – 1/2 tcyc 28 ns
BREQ delay time 1 (PLL on, 1/4 cycle delay) t
BRQD1
— 3/4 tcyc +18 ns 15.12
BACK setup time 1 (PLL on, 1/4 cycle delay) t
BAKS1
1/4t cyc + 9 — ns
BACK hold time 1 (PLL on, 1/4 cycle delay) t
BAKH1
9 – 1/4 tcyc 28 ns
BREQ delay time 2 (PLL on) t
BRQD2
— 28 ns 15.13
BACK setup time 2 (PLL on) t
BAKS2
9 — ns
BACK hold time 2 (PLL on) t
BAKH2
19 — ns
Bus tri-state delay time 1 (PLL on) t
BOFF1
0 25 ns 15.10,
Bus buffer on time 1 (PLL on) t
BON1
0 18 ns
15.12
Bus tri-state delay time 1 (PLL on, 1/4 cycle delay) t
BOFF1
1/4 tcyc 1/4 tcyc + 25 ns 15.10,
Bus buffer on time 1 (PLL on, 1/4 cycle delay) t
BON1
1/4 tcyc 1/4 tcyc + 18 ns
15.12
Bus tri-state delay time 1 (PLL off) t
BOFF1
0 30 ns 15.11,
Bus buffer on time 1 (PLL off) t
BON1
0 25 ns
15.13
Bus tri-state delay time 2 (PLL on) t
BOFF2
1/2 tcyc 1/2 tcyc + 25 ns 15.10,
Bus buffer on time 2 (PLL on) t
BON2
1/2 tcyc 1/2 tcyc + 18 ns
15.12
Bus tri-state delay time 2 (PLL on, 1/4 cycle delay) t
BOFF2
3/4 tcyc 3/4 tcyc + 25 ns 15.10,
Bus buffer on time 2 (PLL on, 1/4 cycle delay) t
BON2
3/4 tcyc 3/4 tcyc + 18 ns
15.12
Bus tri-state delay time 3 (PLL off) t
BOFF3
0 30 ns 15.11,
Bus buffer on time 3 (PLL off) t
BON3
0 25 ns
15.13