4.4
Interface Logic Module
Refer to schematic 839-7994-151.
The Interface Logic Module 1A3 provides the interconnection
and logic to control the RF modules and 50 volt power supply.
Circuitry includes RF power foldback, agc and the rf peak
detectors for forward and reflected power samples.
4.4.1
Peak Detectors
There are four rf peak detectors that convert the rf samples from
the visual and aural directional couplers in to a dc value for uses
by the logic. Each rf input is coupled by a 4:1 step up transformer
to a HP2800 hot carrier diode detector were the rf is turned into
a dc value. The cathode of the detector is passed on through a
low pass filter to a LM324 voltage follower buffer. The output
for the voltage follower is connected to a calibration pot to set a
reference voltage for the sample. A first order temperature cor-
rection uses a second HP2800 diode to supply a negative bias
voltage to the negative input of the buffer.
4.4.2
Foldback Circuits
Following the detector calibration pots are two buffers, one for
the remote analog output and the other for internal uses. The
internal samples are passed on to the transmitter forward and
reflected power meter readings in the exciter. The reflected power
sample is passed to the visual and aural foldback circuits U5
IC
PIN TYPE
FUNCTION
1
IN
840MS CLOCK TO ALL REGISTERS
2
IN
METER UP COMMAND
3
IN
METER DOWN COMMAND
4
IN
RESET
5
IN
VISUAL IF OSCILLATOR UNLOCK
6
IN
MASTER OSCILLATOR UNLOCK
7
IN
AURAL IF OSCILLATOR UNLOCK
8-13 IN
NOT USED
14 OUT
ENABLE CURRENT METER MUX
15 OUT
ENABLE VOLTAGE METER MUX
16 OUT
TURN ON DECIMAL POINT 1
17 OUT
TURN ON DECIMAL POINT 2
18 OUT
TURN ON DECIMAL POINT 3
19 OUT
METER SELECT COUNTER BIT 0
20 OUT
METER SELECT COUNTER BIT 2
21 OUT
METER SELECT COUNTER BIT 1
22 OUT
ENABLE METER SQUARING
23 OUT
FREQUENCY UNLOCKED
A2 A1 A0
PIN NUMBER
20 21 19 14 15 22 17 18 16
A2-A0 COUNT
VIS FWD PWR
0
0
0
0
0
1
1
1
1
0
AUR FWD PWR
0
0
1
0
0
1
1
1
1
1
VIS REF PWR
0
1
0
0
0
1
1
1
0
2
AUR REF PWR
0
1
1
0
0
1
1
1
0
3
EXC VIS PWR
1
0
0
0
0
1
9
1
1
4
EXC AUR PWR
1
0
1
0
0
1
0
1
1
5
50 V SUPPLY
1
1
0
0
1
0
1
1
0
6
50 CURRENT
1
1
1
1
0
0
1
1
0
7
Pin 4 RESET when asserted low will force U17 into tri-state out mode on power fail conditions.
Pins 14, 15, & 22 are asserted Hi to enable the meter multiplexers U4 and U6 on sheet 1 as noted in the above text.
Pins 16, 17, & 18 are asserted low to turn on the decimal point of the digital meter display as noted in the above text.
Pins 19, 20, & 21 is a 3 bit up/down counter used to select which metering function is displayed.
Pin 23 is asserted low if pin 5, 6 or 7 input is low forming a summary FREQUENCY UNLOCK status indication.
Table 4-2. U17 Functional Descriptions
Platinum™ Series
4-4
888-2457-001
Rev. B: 7/15/02
WARNING: Disconnect primary power prior to servicing.
Содержание Platinum HT EL 2000LS
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