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MCT-MC
4.3
Appendix
- 149 -
FDC MCT-MC
A.1.7 Packet Syntax
Each message packet begins with a one-byte controller address, from 0x01 to 0x1F. The second byte in the
message packet identifies the message command: read (0x03); write single (0x06) or write multiple (0x10).
The next “n” bytes of the message packet contain register addresses and/or data. The last two bytes in the
message packet contain a two-byte Cyclical Redundancy Checksum (CRC) for error detection.
Packet format:
address
command
registers and/or data
CRC
Read Register(s) Command (0x03)
This command returns from 1 to 125 registers. This command is used for reading one or more data locations
from the MC.
Packet sent to the MC:
controller address (1 byte)
read command (0x03)
starting register high byte
starting register low byte
number of registers high byte (0x00)
number of registers low byte
CRC low byte
CRC high byte
Packet returned from the MC:
controller address (1 byte)
read command (0x03)
number of data bytes (1 byte)
first register data low byte
first register data high byte
…
…
register n data high byte
register n data low byte
CRC low byte
CRC high byte
Example:
Read registers 35 and 36 (loop 1 process variable and set point) of controller at address 1
configured for 1 decimal point.
Sent:
01 03 00 23 00 02 35 C1
Received:
01 03 04
03
0D
01
F3
2A 61
Message data: 781 (0x
030D
) = process variable of 78.1
499 (0x
01F3
) = set point of 49.9
nn
nn
nn nn… nn nn
nn
03
nn nn
00 nn
nn nn
nn
03
nn
nn nn … nn nn
nn nn
Содержание MCT-MC 4.3
Страница 1: ...MCT MC 4 3 User Manual MCT MC 4 3 User Manual Rev A February 2018...
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