Furuno FM-8800, Руководство по обслуживанию

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5.4 Block Description
5-13
TX CIRCUIT
A signal of 45 MHz inputted from CPU board is a FM-compatible signal modulated by
DDS on CPU board. This modulated signal is amplified by U10 and U5. Then, it is
converted by TX local frequency of Fo + 45 MHz of PLL output frequency on CR101
into Fo.
(Fo + 45 MHz) – 45 MHz = Fo
This output signal goes through Q101, BPF (L/C), Q5 and Q1. Its signal is amplified by
U1 (RA35H1516M). When PA input is anywhere between 20 to 50 mW will be over 40
W.
RA35H1516M
(154 MHz to 162 MHz, 40 W RF MOS-FET AMP Module)
Table 5.4.4 RA35H1516M
Item Conditions Maximum range
V
DD
V
GG
<5 V 17 VDC
V
GG
V
DD
<12.5 V, Pin=0 mW 6 VDC
Pin/Pout 154-162 MHz, Zin/out=50 ohm Pin=100 mW, Pout=50 W
T case -30 - +110 deg.
PA output goes through T/R SW circuit (CR2) and LPF structured on LC to reduce
spurious emissions. Cut-off frequency for LPF is 190 MHz and it is reduced by less than
-40 dB with 2 x Fo. Therefore, maintained spurious emissions are kept less then -80
dB(less then 0.25 uW) by LPF and PA(2
nd
harmonic: less then –50 dB). This output line
is connected to antenna terminal via CM coupler on U2 (DSC3D2D_0157). CM coupler
detects R VSWR and F VSWR. Power control is carried out on the basis comparison
between this signal and PWR CONT voltage from CPU board. R-VSWR functions as a
protector at the time of opening an antenna and an antenna being in a state of short(R
VSWR>F VSWR).
At following condition;
V
DD
=12.5V, V
GG
=5V, Pin=50 mW
- Output: more than 40 W
- Efficiency: more than 50 %
- 2
nd
harmonic: less than – 50 dBc
(1) (2) (3) (4)
(5)
(5)
(1)
(2) (3)
(4)
(1): RF Input(Pin)
(2): Gate Voltage(V
GG
)
(3): Drain Voltage(V
DD
)
(4): RF Output(P
out
)
(5): RF Ground(Case)