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MCIMX53SMD Board Hardware User’s Guide, Rev. 0
Freescale Semiconductor
channel 5 port through I2S communications protocol. The Audio CODEC also receives command instructions
from the I2C channel 2 bus and receives a 24 MHz clock input signal from GPIO_0 of the i.MX53 processor.
These seven connections with the processor are the only required signals.
The Audio CODEC provides a Left and Right Stereo output signal capable of providing a 16Ω set of
headphones/earbuds with up to 58 mW of power. The Audio CODEC is also capable of receiving a single
microphone channel, and converting the information to a digital format and transmitting it back to the
processor. The CODEC also generates the necessary microphone bias voltage to allow proper condenser
operation.
The MCIMX53SMD board was designed to be used with a range of microphone options, including the mono-
microphone/earbud sets commonly used with cellular phones. For this reason, the microphone bias voltage is
connected to the microphone input signal on the MCIMX53SMD board, rather than connecting the bias
voltage signal to a separate channel on the Microphone Jack (J6) and allowing a higher end microphone to
connect the bias source closer to the connector. In addition, the right channel audio output of the Audio
CODEC can be sent to the Microphone Jack. The MCIMX53SMD board does not come with this feature by
default, but the developer can easily populate the L22 footprint with a ferrite bead or a 0Ω jumper.
The MCIMX53SMD board is also designed with a cable detect feature on both the Headphone and
Microphone Jacks. One option would be to use an audio connector with an internal flag that would make or
break depending on whether the connector barrel was inserted into the jack. These connectors are available,
but are often more expensive and may have supply problems. On the MCIMX53SMD board, a four pin,
Audio/Video style connector was chosen to implement the cable detect feature. When a three connector
cable is inserted into the connector, the cable detect pin is shorted to the ground pin, sending an active low
signal back to the processor to indicate that a cable was inserted. For this reason, the ground pin on the
Microphone and Headphone Jacks must be system ground and not a virtual audio ground. Therefore, the
Audio CODEC was designed to use the AC Coupled audio mode which makes use of two 220 µF capacitors. If
the developer wishes to design a board that uses a flagged jack for cable detection or does not implement a
cable detection scheme, it would then be possible to use the Direct Drive feature of the Audio CODEC and
eliminate the need for large capacitors.
The Audio CODEC can be reset by software through the I2C channel, but there is no hardware reset pin on the
CODEC. Should I2C communications be lost between the Audio CODEC and the Processor, it may be necessary
to shut down DCDC_3V3_BB power to the MCIMX53SMD board and reinitialize the Audio CODEC by the power
up sequence.
A power amplifier (TS4984IQT) and a 2-channel speaker are added to the MCIMX53SMD board. The
TS4984IQT amplifier has been designed for top-class stereo audio applications. Due to its compact and power
dissipation efficient QFN package, it can be used in a variety of applications. With a BTL configuration, this
Audio Power Amplifier can deliver 1W per channel of continuous RMS output power into an 8Ω load at 5V. An
externally controlled pin can be configured to reduce the supply current to less than 10 nA per channel. The
device also features an internal thermal shutdown protection. The gain of each channel can be configured by
external gain setting resistors.
5.12.
Ethernet (Debug Board)
The Ethernet subsystem of the MCIMX53SMD board is provided by the SMSC LAN8720 Ethernet Transceiver
(U17). The Ethernet Transceiver (or PHY) receives standard RMII Ethernet signals from the Fast Ethernet
Controller (FEC) of the i.MX53 processor. The processor takes care of all Ethernet protocols at the MAC layer
and higher layers. The PHY is responsible only for the Link Layer formatting. The PHY receives a 50 MHz clock
signal from the oscillator X1. On initial versions of the i.MX53 silicon, this clock signal was shared with the
SATA module of the i.MX53 processor. On current versions of the MCIMX53SMD board, the 50 MHz clock
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