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MCIMX53SMD Board Hardware User’s Guide, Rev. 0
Freescale Semiconductor
the VGA Dock. The video data signals are referenced to 2.75V (TVDAC_2V75), while all other signals are
referenced to 5V. The synchronization signals leave the i.MX53 processor referenced to 3.3V, but go through a
pair of one-way level shifters (U12, U13) to meet the VGA standard required 5V reference. Similarly, the I2C
channel 2 signals leave the processor referenced to 3.3V, but go through a bi-directional level shifter (U14) to
also get referenced to 5V. See the
section for actual pin-out of J131 connector.
The Component Video signals are terminated to ground, each with a 75Ω resistor to meet cabling
requirements. A separate VGA ground plane has been created to minimize noise on the video signals by
necking through a small trace. The voltage reference signal for the TVDAC module is provided by placing a
1.05K 1%Ω resistor at pin Y18. The constant current source provided by the TVDAC module generates the
exact voltage reference required by the VGA standard. A 0.1 µF capacitor should be connected to pin AA19 to
reduce noise on the voltage reference sense point. Each of the Component Video output traces should be
connected to their respective feedback pins. This enables the Cable Detection (CD) circuitry to detect whether
or not a cable has been plugged into the connector. The CD circuitry is not active for TV signal output, so it
would not be necessary to connect the feedback circuit in that case. If any signal filtering or conditioning
components are added to the Component Video traces, the feedback pins should be connected after the
additional components (it means, feedback pins should tap into to the connector side of the Component Video
signals). It is recommended to use a ferrite bead near the voltage input pins of the TVDAC module in order to
reduce noise in the video module.
Besides VGA signal, LINE IN/OUT and USB are included in the VGA Dock. Developers can make their own board
for this Dock. The MCIMX53SMD board uses the Dock connector ERF8-020-01-L-D-EM2-TR from SAMTEC.
Developers need to choose a suitable connector for their board.
5.9.
LVDS Video Output
The i.MX53 processor contains two separate LVDS modules that can be operated independently. Each module
provides five sets of differential pair signals: four are used for data signal and one for clock signal. The
MCIMX53SMD board uses one of the two modules to provide an optional secondary display panel that can be
used in conjunction with one of the other primary means of video output, or as the sole video output, if
needed. The MCIMX53SMD board makes use of three of the differential pair data pins and the clock pins.
These signals, combined with a display enable pin, a contrast pin, two separate channels of I2C
communications, an interrupt pin, and power supplies (5V and 3.3V) will provide the necessary signals to
support many of the LVDS display panels currently available in the market. The connector used is a 30-pin
connector that meets the LVDS standards for connectors (Hirose, DF19G-30P-1H (56)).
In the MCIMX53SMD board, development work with LVDS panels was done with the Hannstar HSD100PXN1-
A00-C11 display. If the developer wishes to use a different LVDS display, a custom cable would most likely be
required to ensure that the plug on the cable end, which is connected to the display, was of the right type, and
to re-order the signals to match the ordering on the display. For using with other displays, signals are
referenced to the following voltages:
LVDS Data/Clock: 2.5V (LVDS_2V5)
Display Control: 3.3V (VLDO3_3V3)
I2C channel 2: 3.3V (VLDO3_3V3)
I2C channel 3: 3.3V (VLDO3_3V3)
Isolation resistors on the I2C channel 2 traces provide a means of isolating the LVDS connector from other
functions on the board, if the LVDS connector is interfering with I2C communication. In addition, the empty
pads can also serve as attachment points for hand soldered wires, if the developer wishes to run different
signals to this connector.
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