Device Overview MC9S12XHY-Family
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
15
1.2.2
Chip-Level Features
On-chip modules available within the family include the following features:
•
CPU12XV1 CPU core
•
Up to 256 Kbyte on-chip flash with ECC
•
8Kbyte data flash with ECC
•
Up to 12Kbyte on-chip SRAM
•
Phase locked loop (IPLL) frequency multiplier with internal filter
•
4–16 MHz amplitude controlled Pierce oscillator
•
Two timer modules (TIM0 and TIM1) supporting input/output channels that provide a range of 16-
bit input capture, output compare, counter and pulse accumulator functions
•
Pulse width modulation (PWM) module with up to 8 x 8-bit channels
•
Up to 12-channel, 10-bit resolution successive approximation analog-to-digital converter (ATD)
•
Up to 40x4 LCD driver
•
PWM motor controller (MC) with up to 16 high current drivers
•
Output slew rate control on Motor driver pad
•
One serial peripheral interface (SPI) module
•
One Inter-IC bus interface (IIC) module
•
Two serial communication interface (SCI) module supporting LIN communications
•
Two multi-scalable controller area network (MSCAN) module (supporting CAN protocol 2.0A/B)
•
On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages
•
Autonomous periodic interrupt (API)
•
Stepper Motor Controller with up to drivers for up to 4 motors
•
Four Stepper Stall Detector modules (one for each motor)
•
Up to 25 key wakup inputs
1.3
Module Features
The following sections provide more details of the modules implemented on the MC9S12XHY family.
Internal 1 MHz RC
osc
No
Supply voltage
4.5 V – 5.5 V
RTI, LVI, CRG,
RST, COP, DBG,
POR, API
Yes
Execution speed
Static-40MHz
Table 1-1. MC9S12XHY Family
Feature
MC9S12XHY128
MC9S12XHY256
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