Festo CPX-P, Руководство пользователя

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Subject to change – 2018/04 84
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Terminal CPX
Technical data – HART input/output module
Pin allocation
Manifold block inputs/outputs CPX-4AE-4AA-H
Inputs Outputs
CPX-P-AB-4XM12-4POL
X1.1: 24 V
SEN x
X1.2: 0 V
X1.3: Input x
X1.4: 0 V
X3.1: 24 V
SEN x+2
X3.2: 0 V
X3.3: Input x+2
X3.4: 0 V
X1.1: Output I0+
X1.2: 0 V
X1.3: –
X1.4: 0 V
X3.1: Output I2+
X3.2: 0 V
X3.3: –
X3.4: 0 V
X2.1: 24 V
SEN x+1
X2.2: 0 V
X2.3: Input x+1
X2.4: 0 V
X4.1: 24 V
SEN x+3
X4.2: 0 V
X4.3: Input x+3
X4.4: 0 V
X2.1: Output I1+
X2.2: 0 V
X2.3: –
X2.4: 0 V
X4.1: Output I3+
X4.2: 0 V
X4.3: –
X4.4: 0 V
CPX-P-AB-2XKL-8POL
X1.1: 24 V
SEN x
X1.2: 0 V
X1.3: Input x
X1.4: 0 V
X2.1: 24 V
SEN x+2
X2.2: 0 V
X2.3: Input x+2
X2.4: 0 V
X1.1: Output I0+
X1.2: 0 V
X1.3: –
X1.4: 0 V
X2.1: Output I2+
X2.2: 0 V
X2.3: –
X2.4: 0 V
X1.5: 24 V
SEN x+1
X1.6: 0 V
X1.7: Input x+1
X1.8: 0 V
X2.5: 24 V
SEN x+3
X2.6: 0 V
X2.7: Input x+3
X2.8: 0 V
X1.5: Output I1+
X1.6: 0 V
X1.7: –
X1.8: 0 V
X2.5: Output I3+
X2.6: 0 V
X2.7: –
X2.8: 0 V
-H-
Note
In the case of mixed operation of
inputs and outputs in one module,
the connections are first assigned
input signals and then output
signals, in ascending order.
-V-
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