User Manual
AIC 324
1.3.5 Page 1
– Input / Output port 8255
+12
R\W
Port A read/write
+13
R\W
Port B read/write
+14
R\W
Port C read/write
+15
R\W
Control port read/write
Operating modes and registers fully comply with the Intel 8255 microchip. For details, see the
standard description, e.g.:
http://en.wikipedia.org/wiki/Intel_8255
ATTENTION!
All the ports support the 0 port. The 1 mode is supported only by
А port,
external synchronization outputs during operation in the 1 mode are routed to separate outputs of
digital connector and not to the
С port as described in the configuration of the 8255 chip.
ATTENTION!
Additional digital port D has the direction of data transfer related to the port
С
8255. i.e. Outputs D3
– D0 have the similar direction with the lower part of the port С (С3 –С0),
outputs D5
– D4 have the similar direction with the upper part of the port С (С7 –С4).
1.3.6 Page 2
– ADC control
+12
W
The least significant byte of the infill ratio for FIFO
Bit #
7
6
5
4
3
2
1
0
Name
FT8
FT7
FT6
FT5
FT4
FT3
FT2
FT1
Bits FT8-1 FIFO threshold during which interrupt is generated for ADC data acquisition from FIFO.
+12
R
The least significant byte of threshold value for FIFO
Bit #
7
6
5
4
3
2
1
0
Name
FC7
FC6
FC5
FC4
FC3
FC2
FC1
FC0
Bits
FС7-0 the least significant byte of the word, specifying the current amount of data in FIFO.
+13
R\W
The most significant address of threshold value for FIFO
Bit #
7
6
5
4
3
2
1
0
Name
х
х
х
х
х
х
FT10
FT9
Bits FT10
– 9 FIFO threshold at which generation of interrupt for ADC data acquisition from FIFO is carried out. FIFO
size amounts to 2048 words.
+13
R
The most significant byte of FIFO infill ratio
Bit #
7
6
5
4
3
2
1
0
Name
0
0
0
0
FC11
FC10
FC9
FC8
Bits FC11
– 8 the most significant byte of the word, specifying the current amount of data in FIFO. FIFO amounts
to 2048 words.
