Fastfame 9W AP Series, Руководство пользователя

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9W
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AP/P + Serial User’s Manual
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3-5 Advanced Chipset Features/Integrated Peripherals
This section allows you to configure the system based on the specific features of
the installed chipset. This chipset manages bus speeds and access to system
memory resources, such as DRAM and the external cache. It also coordinates
communications between the conventional ISA bus and the PCI bus. It must be
stated that these items should never need to be altered. The default settings
have been chosen because they provide the best operating conditions for your
system. The only time you might consider making any changes would be if you
discovered that data was being lost while using your system
The first chipset settings deal with CPU access to dynamic random access
memory (DRAM). The default timings have been carefully chosen and should
only be altered if data is being lost. Such a scenario might well occur if your
system had mixed speed DRAM chips installed so that greater delays may be
required to preserve the integrity of the data held in the slower memory chips.
SDRAM CAS Latency Time
When synchronous DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing.
The Choice: 2, 3
9W
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AP/P + Serial User’s Manual
3-14
SDRAM Cycle Time Tras/Trc
Select the number of SCLKs for an access cycle.
The Choice: 5/7, 6/8.
SDRAM Address Setup Time
This item controls the Address Setup to the SDRAM timing.
The Choice: 1, 2.
SDRAM RAS-to-CAS Delay
SDRAM RAS-to-CAS Delay is an important parameter that affects SDRAM
performance. If thesystem fails to bootup, please set this item to 3.
The Choice: 2, 3.
SDRAM RAS Precharge Time
The RAS Precharge means the timing to inactive RAS and the timing for DRAM to
do precharge before next RAS can be issued. RAS is the address latch control
signal of DRAM row address. The default setting is 3 clocks.
The Choice: 2, 3.
System BIOS Cacheable
Selecting Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh,
resulting in better system performance. However, if any program writes to this
memory area, a system error may result.
The choice: Enabled, Disabled.
Video BIOS Cacheable
Select Enabled allows caching of the video BIOS , resulting in better system
performance. However, if any program writes to this memory area, a system
error may result.
The Choice: Enabled, Disabled.
Memory Hole At 15M-16M
You can reserve this area of system memory for ISA adapter ROM. When this
area is reserved, it cannot be cached. The user information of peripherals that
need to use this area of system memory usually discusses their memory
requirements.
The Choice: Enabled, Disabled.