
Hardware Installation and Change of Battery
5.5.1 Configuration via DIP Switch
Figure 8:
DIP Switch internal (Detail)
For the position of the DIP switches on the PCB top layer, please refer to Figure 2, page 16.
On delivery the DIP switches are all off.
DIP-
Switch
Pin
Description
SW901
(CFG1)
1
LC_IO23
User-defined via drivers
(see chapter „Via CPU GPIO register the settings can be
handled as shown in the following table. “,
page 29)
2
LC_IO22
3
LC_IO21
4
LC_IO20
SW900
(CFG0)
1
LC_IO15
User-defined via drivers
(see chapter „Via CPU GPIO register the settings can be
handled as shown in the following table. “,
page 29)
2
LC_IO14
3
LC_IO13
4
LC_IO12
Table 3:
DIP switch SW901, SW900
5.5.2 Configuration via Jumper JP 800
Via the jumper SPI-Flash a Fail Save Mechanism can be enabled.
For the position of the Jumper on the PCB top layer, please refer to Figure 2, page 16.
On delivery the Jumper is not set.
JP800
Jumper JP180 Meaning
Figure 9:
Jumper internal (Detail)
Jumper set
Switch to second Flash with
„Fallback“ Firmware
Jumper not set Fail Save Mechanism disabled
Table 4:
Jumper JP180
Page 24 of 37
Hardware Manual • Doc. No.: I.2007.21 / Rev. 1.1
EPPC-T10