Epson S1C63358, Техническое руководство

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EPSON
S1C63358 TECHNICAL MANUAL
CHAPTER 5: SUMMARY OF NOTES
5.2 Summary of Notes by Function
Here, the cautionary notes are summed up by function category. Keep these notes well in mind when
programming.
Memory and stack
(1) Memory is not implemented in unused areas within the memory map. Further, some non-implemen-
tation areas and unused (access prohibition) areas exist in the peripheral I/O area. If the program that
accesses these areas is generated, its operation cannot be guaranteed. Refer to the I/O memory maps
shown in Tables 4.1.1 (a)–(f) for the peripheral I/O area.
(2) Part of the RAM area is used as a stack area for subroutine call and register evacuation, so pay
attention not to overlap the data area and stack area.
(3) The S1C63000 core CPU handles the stack using the stack pointer for 4-bit data (SP2) and the stack
pointer for 16-bit data (SP1).
16-bit data are accessed in stack handling by SP1, therefore, this stack area should be allocated to the
area where 4-bit/16-bit access is possible (0100H to 01FFH). The stack pointers SP1 and SP2 change
cyclically within their respective range: the range of SP1 is 0000H to 01FFH and the range of SP2 is
0000H to 00FFH. Therefore, pay attention to the SP1 value because it may be set to 0200H or more
exceeding the 4-bit/16-bit accessible range in the S1C63358 or it may be set to 00FFH or less. Memory
accesses except for stack operations by SP1 are 4-bit data access.
After initial reset, all the interrupts including NMI are masked until both the stack pointers SP1 and
SP2 are set by software. Further, if either SP1 or SP2 is re-set when both are set already, the interrupts
including NMI are masked again until the other is re-set. Therefore, the settings of SP1 and SP2 must
be done as a pair.
Power supply and operating mode
(1) When operating the S1C63358 with a 0.9–1.4 V power supply voltage, software control is necessary.
Set the oscillation system voltage regulator to the V
C2
mode. When 1.4 V or more power supply
voltage is used, don't set the oscillation system voltage regulator into the V
C2
mode.
(2) When using the A/D converter with a 0.9–1.6 V power supply voltage, software control is necessary.
Set the A/D converter voltage circuit to the V
C2
mode. When 1.6 V or more power supply voltage is
used, don't set the A/D converter circuit into the V
C2
mode.
(3) If the power supply voltage is out of the specified voltage range for an operating mode, do not switch
to the operating mode. It may cause malfunction or increase current consumption.
(4) When switching from the normal mode to the V
C2
mode, the VDSEL and/or VADSEL registers should
be set to "1" after taking a 100 msec or longer interval for the V
C2
to stabilize from switching the
LPWR register to "1".
(5) When switching from the V
C2
mode to the normal mode, use separate instructions to switch the mode
(VDSEL = "0" or VADSEL = "0") and turn the LCD booster OFF (LPWR = "0", if LCD is unused).
Simultaneous processing with a single instruction may cause malfunction.
(6) The OSC3 oscillation circuit can operate only in the normal mode with a power supply voltage from
2.3 V to 3.6 V.
Watchdog timer
(1) When the watchdog timer is being used, the software must reset it within 3-second cycles.
(2) Because the watchdog timer is set in operation state by initial reset, set the watchdog timer to disabled
state (not used) before generating an interrupt (NMI) if it is not used.
Oscillation circuit
(1) When switching the CPU system clock from OSC1 to OSC3, first set V
D1
. After that maintain 2.5 msec
or more, and then turn the OSC3 oscillation ON.
When switching from OSC3 to OSC1, set V
D1
after switching to OSC1 and turning the OSC3 oscilla-
tion OFF. However, when the CR oscillation circuit has been selected as the OSC1 oscillation circuit, it
is not necessary to set V
D1
.