1
2.3.2 Interface
This printer has both
an 8-bit parallel interface and an
serial interface.
2.3.2.1 8-Bit Parallel Interface
Operating Principles
Figure 2-29 shows the 8-bit parallel interface data transmission timing. Data is transferred between a host
computer and the printer using the following sequence:
a)
b)
c)
d)
BUSY
DATA
STROBE
Figure 2-29. 8-bit Parallel Interface Data Transmission Timing
First, the host computer confirms that the BUSY signal from the printer is low or that the
signal from the printer is high. When the BUSY signal is low, the
printer is ready to receive data.
When
it is high, the printer can not receive data from the host computer since the printer is
data.
Therefore, the host computer does not transfer data until the BUSY signal changes from high to low.
(Some host computers check both the BUSY and
signals, and others just check either the
BUSY or
signal.)
After the host computer has confirmed that the BUSY signal is low, it places data (8 bits per word) in
parallel on the data bus
and the printer reads the data at the falling edge of the STROBE
pulse.
After receiving a data word from the host computer, the printer sets the BUSY signal high to inform the
host computer that the printer is
data and is not ready to receive any more data.
After
the data, the printer sets the
signal low, allowing the host computer to
transfer data again. The printer sets the BUSY signal low approximately 5
after setting the
signal low, then sets the
signal high after approximately 5
informing that the host
computer that the printer is ready to receive data.
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Содержание LQ-1060
Страница 1: ...EPSON TERMINAL PRINTER L Q 8 6 0 1 0 6 0 TECHNICAL MANUAL ...
Страница 5: ...REVISION TABLE REVISION DATE ISSUED I CHANGE DOCUMENT I I 1st issue I v ...
Страница 68: ...cc o REV A N N n 1 cc b I al cc u co n4 2 1 Figure 2 14 Main Switching 2 21 ...
Страница 79: ...REV A Table 2 20 State of Module 1 1 I W stay E H H L H d O s H H 4 2 32 ...
Страница 203: ...Figure 5 6 MONPS MONPSE Board Voltage Waveforms 5 17 ...
Страница 204: ...REV A Fiaure 5 6 MONPS MONPSE Board Voltage Waveforms z L 5 18 ...
Страница 205: ...Figure 5 6 MONPS MONPSE Board Voltage Waveforms 5 19 ...
Страница 217: ... n 3 m I BUS CONTROL 1 LJ Pc II SYSTEM CONTROL I I L 1 I PERIPHERAL BUS IIF u lJ Figure A 2 PD78213 Block Diagram A 3 ...
Страница 248: ...REV A A 3 DRAWINGS 3 J32 J TI g 4 Figure A 27 MONPS Board Component Layout A 34 ...
Страница 249: ... J30 33r J32 d m b13 G a TI 7 IC20 r El m J24 C2 L cl mow B L U E u Figure A 28 MONPSE Board Component Layout A 35 ...
Страница 250: ... 2 1 1 1 1 I A b 2 Ozaz 1202 C O ZZH Z UOEE vu I 1 Figure A 29 MONPS Board Circuit Diagram ...
Страница 251: ...REV A 1 UXZO xl OX 9 xl Onz b 8M 118 en A N J 93 T 818 Figure A 30 MONPSE Board Circuit Diagram A 37 ...
Страница 252: ...L t g Figure A 31 JUNMM Board Component Layout A 38 ...