
DIP Switch Settings
Table 3-3 shows the 8143 DIP switch settings, and Table 3-4 lists the bit rates selected by the
DIP switch settings.
When a standard 8-bit parallel interface is used instead of the 8143 l/F board, DIP switch 1-8 should be turned off.
Table 3-3. DIP Switch Settings
DIP SW
Function
ON
OFF
1-1
Bit rate selection
See Table 3-4.
1-2
Data length selection
7 bits
8 bits
1-3
1)
Bit rate selection
See Table 3-4.
1-4
Bit rate selection
See Table 3-4.
1-5 (JO/E)
Parity selection
Even
Odd
1-6
Parity selection
Enabled
Disabled
1-7
Bit rate selection
See Table 3-4.
1-8 (P/S)
# 8143 l/F selection
Enabled
Disabled
Table 3-4. Bit Rate Selection
Bit Rate
Bit Rate
(BPS)
)
(BPS)
75
ON
ON
ON
ON
OFF
ON
ON
ON
110
ON
O
N
ON
OFF “
-
2,400
OFF
ON
ON
OFF
134.5
ON
ON
ON
4,800
OFF
ON
OFF
ON
150
‘ON
ON
OFF
OFF
9,600
ON
OFF
OFF
2clo
ON
–
O F F
-
O
N
ON
19,200
OFF
OFF
ON
ON
.
——.
300
ON
-
OFF
ON
OFF
19,200
OFF
-
OFF
ON
OFF
600
ON
OFF
OFF
ON
19,200
OFF
OFF
OFF
ON
1,200
ON
OFF
OFF
OFF
19,200
OFF
‘OFF
OFF
OFF
NOTE: In the current
operation, normal data transfer cannot be guaranteed at a bit rate greater than 1200 BPS.
Handshaking Timing
The handshake controls are shown in Table 3-5.
Table 3-5. 8143 Handshaking Control
Transmission
Flag
Control
Possible
Resets when the vacant area of the input
Sends X-ON when the vacant area of the input
buffer is over 528 bytes.
buffer reaches 528 bytes.
.—.—. .
Impossible
Sets when the vacant area of the input buffer
Sends X-OFF when the vacant area of the
is 256 bytes or less.
input buffer reaches 256 bytes.
Error Handling
Errors are processed as follows :
Parity error:
an asterisk “
is printed.
Overrun error :
ignored.
Framing error:
ignored.
3-3
Содержание LQ-1060
Страница 1: ...EPSON TERMINAL PRINTER L Q 8 6 0 1 0 6 0 TECHNICAL MANUAL ...
Страница 5: ...REVISION TABLE REVISION DATE ISSUED I CHANGE DOCUMENT I I 1st issue I v ...
Страница 68: ...cc o REV A N N n 1 cc b I al cc u co n4 2 1 Figure 2 14 Main Switching 2 21 ...
Страница 79: ...REV A Table 2 20 State of Module 1 1 I W stay E H H L H d O s H H 4 2 32 ...
Страница 203: ...Figure 5 6 MONPS MONPSE Board Voltage Waveforms 5 17 ...
Страница 204: ...REV A Fiaure 5 6 MONPS MONPSE Board Voltage Waveforms z L 5 18 ...
Страница 205: ...Figure 5 6 MONPS MONPSE Board Voltage Waveforms 5 19 ...
Страница 217: ... n 3 m I BUS CONTROL 1 LJ Pc II SYSTEM CONTROL I I L 1 I PERIPHERAL BUS IIF u lJ Figure A 2 PD78213 Block Diagram A 3 ...
Страница 248: ...REV A A 3 DRAWINGS 3 J32 J TI g 4 Figure A 27 MONPS Board Component Layout A 34 ...
Страница 249: ... J30 33r J32 d m b13 G a TI 7 IC20 r El m J24 C2 L cl mow B L U E u Figure A 28 MONPSE Board Component Layout A 35 ...
Страница 250: ... 2 1 1 1 1 I A b 2 Ozaz 1202 C O ZZH Z UOEE vu I 1 Figure A 29 MONPS Board Circuit Diagram ...
Страница 251: ...REV A 1 UXZO xl OX 9 xl Onz b 8M 118 en A N J 93 T 818 Figure A 30 MONPSE Board Circuit Diagram A 37 ...
Страница 252: ...L t g Figure A 31 JUNMM Board Component Layout A 38 ...