Table F-3. Continued
Signal
Return
Pin
Signal
2
20
DATA1
3
21
DATA2
4
22
DATA3
5
23
DATA4
6
24
DATA5
7
25
DATA6
a
26
DATA7
9
27
DATA8
ACKN LG
tlon
IN
IN
IN
IN
IN
IN
IN
IN
OUT
DATA1 to DATA8 carry the
parallel interface data.
These signals use positive
logic (HIGH LOW 0),
and the levels of these
signals must be kept
constant for 0.5 microsecond
before and after the active
edge of the STROBE signal.
Whetherthe interface ignores
unrecognizable codes
received or prints them as
spaces is determined by the
setting of
DIP
switch l-4.
The most significant data bit
is
However, if DIP
switch 4-4 is OFF, the
interface will ignore DATA8,
giving an effective data
length of 7 bits.
After reading each character,
the printer drops the level of
this signal to
about
10 microseconds to
acknowledge that it has read
one character. After this
pulse the host computer can
output the next character.
The timing of this signal is
determined in relation to the
BUSY signal, not the
STROBE
signal. However,
the timing of this signal with
respect to BUSY can be
varied, depending on the
setting of DIP switches 4-1
and 4-2.
F-4
Parallel Interface
Содержание GQ-3500
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