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Endace DAG 4.2S Скачать руководство пользователя страница 32

EDM01-02: DAG 4.2S Card User Guide

©2005

27

Version 7: May 2006

Preventing

time-stamps

drift

To prevent the DAG card clocks time-stamps drifting against UTC, the

master can be synchronised to the host PC’s clock which in turn utilises

NTP. This then provides a master signal to the slave card.

The cards are locked together by connecting the synchronisation connector

ports of both cards with a standard RJ-45 Ethernet cross-over cable.

Configure one card to synchronize to the PC clock and output a RS-422

synchronization signal to the second card.

dag@endace:~$ dagclock –d dag0 none overin overout
muxin   over
muxout  over
status  Synchronised Threshold 11921ns Failures 0 Resyncs 0
error   Freq -691ppb Phase -394ns Worst Freq 143377ppb Worst Phase 88424ns
crystal Actual 49999354Hz Synthesized 16777216Hz
input   Total 87464 Bad 0 Singles Missed 0 Longest Sequence Missed 0
start   Wed Apr 27 14:27:41 2005
host    Thu Apr 28 14:59:14 2005
dag     Thu Apr 28 14:59:14 2005

The slave card configuration is not shown, the default configuration is

sufficient.

6.2.3 Card with Reference Time Synchronization

Description

The best timestamp accuracy occurs when a DAG card is connected to an

external clock reference, such as a GPS or CDMA time receiver.

Pulse signal

from external

sources

The DAG synchronisation connector accepts a RS-422 Pulse Per Second

[PPS] signal from external sources.

This is derived directly from a reference source, or distributed through the

Endace TDS 2 [Time Distribution Server] module which allows two DAG

cards to use a single receiver.

More cards can be accommodated by daisy-chaining TDS-6 expansion

units to the TDS-2 unit, each providing outputs for an additional 6 DAG

cards.

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Содержание DAG 4.2S

Страница 1: ......

Страница 2: ...839 0540 Fax 64 7 839 0543 Americas Endace USA Ltd Suite 220 11495 Sunset Hill Road Reston Virginia 20190 United States of America Phone 1 703 382 0155 Fax 1 703 382 0155 Europe Middle East Africa End...

Страница 3: ...and Materials The product that this manual pertains to may include extra components and materials that are not essential to its basic operation but are necessary to ensure compliance to the product st...

Страница 4: ...Card LED Status 9 4 2 DAG 4 2S Card Capture Session 10 4 4 DAG 4 2S Card Configuration Options 13 4 5 Inspect Links Data and Cells 16 4 6 Reporting Problems 18 Chapter 5 Running Data Capture Software...

Страница 5: ...EDM01 02 DAG 4 2S Card User Guide 2005 ii Version 7 May 2006...

Страница 6: ...ption The purpose of this DAG Card User Manual is to describe Installing DAG 4 2S card Setting Optical Power DAG 4 2S Card Confidence Testing Running Data Capture Software Synchronizing Clock Time Dat...

Страница 7: ...tecture Description Serial SONET optical data is received by the DAG 4 2S card optical interface and fed through a demultiplexor into a physical layer ASIC The packet data is then fed immediately into...

Страница 8: ...III LE HE or newer chip set Minimum of 128 MB RAM At least one free 64 bit 3 3v signaling only PCI slot with 3 3V and 5V power Software distribution requires 30MB free space Endace Linux Install CD re...

Страница 9: ...EDM01 02 DAG 4 2S Card User Guide 2005 4 Version 7 May 2006...

Страница 10: ...the following sections of information Installation of Operating System and Endace Software Insert the Card into PC DAG 4 2S Card Optical Connectors 2 1 Installation of Operating System and Endace Soft...

Страница 11: ...l the top is for the transmitted signal The transmit port is only connected if the loop back facility being used in the DAG to daisy chain systems or if a data generation program being used If the Tx...

Страница 12: ...bre In this chapter This chapter covers the following sections of information DAG 4 2S Card Optical Power Input Splitter Losses 3 1 DAG 4 2S Card Optical Power Input Description The optical power inpu...

Страница 13: ...put 90 10 splitter will have losses of about 10 dBm in the high loss output and 2 dBm in the low loss output Single mode fibre loss A single mode fibre connected to a multi mode input has minimal extr...

Страница 14: ...YSYCC Style DAG 4 2S Card Configuration Options Inspect Links Data and Cells Reporting Problems 4 1 Interpreting DAG Card LED Status Description The DAG 4 2S card has a block of 6 status LEDs one blue...

Страница 15: ...ports configuration status and physical layer interface statistics for the DAG 4 2S card In a troubleshooting configuration options si should be passed to the tool to watch the operational status of t...

Страница 16: ...tand Link Layer Configuration Learn about the link layer configuration in use at the network link being monitored Important parameters include specific scrambling options in use If the information can...

Страница 17: ...nomuxeql link PoS noreset OC48c nofcl noeql sonet slave scramble PoS nopmin nopmax nodiscard crc32 pscramble norxpkts notxpkts txrclk 78MHz long 61440 short 40 packet varlen slen 48 packetA drop 0 pci...

Страница 18: ...SONET PoS mode no muxfcl un set facility loopback in the MUX no muxeql un set equipment loopback in the MUX no reset hold release framer in reset oc48c set framer to OC48c mode no fcl un set facility...

Страница 19: ...there is either no signal at the receiver or the optical signal strength is too low to be recognized OoF Out of frame If set the section overhead processor is not locked to the SONET stream LoF Loss...

Страница 20: ...r of PoS frames aborted since last reading FCSErr Number of PoS frames with FCS errors since last reading Invalid Number of Invalid PoS frames received since last reading Path_Label SONET SDH C2 byte...

Страница 21: ...Check that the LoS OoF and LoF being the first three columns are zero Check light levels Step 2 Inspect for BIP Errors Check that no BIP errors occur otherwise check cabling and light levels Step 3 C...

Страница 22: ...s not normally needed The laser radiation is in the invisible infrared part of the spectrum When the laser is turned on the red laser warning LED will be lit In a test bench situation where two DAG ca...

Страница 23: ...ftware version package in use 5 UNIX operating system only Any compiler errors or warnings when building DAG driver or tools 6 UNIX operating system only For Linux and FreeBSD messages generated when...

Страница 24: ...e has been downloaded and the card is configured The integrity of the card s physical layer is then set and checked Process Setting a data capture session is described in the following process Process...

Страница 25: ...s longer than slen are truncated Packets shorter than slen will produce shorter records saving bandwidth and storage space Full packet capture for example tools dagfour d dag0 varlen slen 1536 Setting...

Страница 26: ...key strokes CTL C dagsnap can also be configured to run for a fixed number of seconds and then exit using the s option 5 2 High Load Performance Description As the DAG card captures packets from the...

Страница 27: ...a faster host CPU may be required Increasing buffer size The host PC buffer can be increased to deal with bursts of high traffic load on the network link By default the dagmem driver reserves 32MB of...

Страница 28: ...UTC Accurate time reference can be obtained from an external clock by connecting to the DAG card using the synchronisation connector or the host PCs clock can be used in software as a reference source...

Страница 29: ...hold health threshold in ns default 596 Option default RS422 in none out none None in none out rs422in RS422 input hostin Host input unused overin Internal input synchronise to host clock auxin Aux in...

Страница 30: ...ock If a PC is running NTP to synchronise its own clock then the DUCK clock is less smooth because the PC clock is adjusted in small jumps However overall the DUCK clock does not drift away from UTC T...

Страница 31: ...ps being correct then one card is configured as the clock master for the other Locking cards together Although the master card s clock will drift against UTC the cards are locked together The cards ar...

Страница 32: ...8424ns crystal Actual 49999354Hz Synthesized 16777216Hz input Total 87464 Bad 0 Singles Missed 0 Longest Sequence Missed 0 start Wed Apr 27 14 27 41 2005 host Thu Apr 28 14 59 14 2005 dag Thu Apr 28 1...

Страница 33: ...2005 host Thu Apr 28 14 59 06 2005 dag Thu Apr 28 14 59 06 2005 Connecting time distribution server The TDS 2 module connects to any DAG card with a standard RJ 45 Ethernet cable and can be placed som...

Страница 34: ...d socket connector pin outs Figure 6 1 RJ45 Plug and Socket Connector Pin outs Out pin connections Normally the GPS input should be connected to the A channel input pins 3 and 6 The DAG can also outpu...

Страница 35: ...EDM01 02 DAG 4 2S Card User Guide 2005 30 Version 7 May 2006...

Страница 36: ...in big endian network byte order All payload data is captured as a byte stream no byte re ordering is applied Table Table 7 1 shows the Type 1 PoS HDLC record BYTE 3 BYTE 2 BYTE 1 BYTE 0 timestamp tim...

Страница 37: ...data formats used Data Format Description type This field contains an enumeration of the frame subtype If the type is zero then this is a legacy format 0 TYPE_LEGACY 1 TYPE_HDLC_POS PoS w HDLC framin...

Страница 38: ...lctr loss counter A 16 bit counter recording the number of packets lost since the previous record Records can be lost between the DAG card and memory hole due to overloading on PCI bus The counter st...

Страница 39: ...h a single 64 bit subtraction It is not necessary to check for overflows between the two halves of the structure as is needed when comparing Unix time structures which is also available to Windows use...

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