Endace DAG 3.6E Скачать руководство пользователя

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Endace Measurement Systems Limited

http://www.endace.com

EDM01.05-05r1 DAG 3.6E Card User Manual

Revision 6. 8 August 2005.

6.2 Timestamps

, continued

Description

,continued

Example code

Here is some example code showing how a 64-bit ERF timestamp (erfts)
can be converted into a struct timeval representation (tv).

unsigned long long lts;
struct timeval tv;

lts = erfts;
tv.tv_sec = lts >> 32;
lts = ((lts & 0xffffffffULL) * 1000 * 1000);
lts += (lts & 0x80000000ULL) << 1; /* rounding */
tv.tv_usec = lts >> 32;
if(tv.tv_usec >= 1000000) {

tv.tv_usec -= 1000000;

tv.= 1;

}

Содержание DAG 3.6E

Страница 1: ...EDM01 05 05r1 DAG 3 6E Card User Manual 2 5 5r1...

Страница 2: ...9246 Hamilton 2001 New Zealand Phone 64 7 839 0540 Fax 64 7 839 0543 support endace com www endace com Endace USA Ltd Suite 220 11495 Sunset Hill Road Reston Virginia 20190 United States of America Ph...

Страница 3: ...digital device pursuant to Part 15 of the Federal Communications Commission FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is oper...

Страница 4: ...ensitivity 9 3 1 1 DAG 3 6 EP Card Sensitivity 9 3 1 2 DAG 3 6ET Card Sensitivity 9 3 2 Interpreting DAG 3 6E Card LED Status 10 3 2 1 DAG 3 6EP Card LED Status 11 3 2 2 DAG 3 6ET Card LED Status 11 3...

Страница 6: ...6E Card Series Architecture System Requirements 1 1 User Manual Purpose Description The purpose of this DAG 3 6E Card User Manual is to describe Installing DAG 3 6E Card Confidence Testing DAG 3 6E C...

Страница 7: ...The DAG 3 6E card by default finds the fastest link configuration possible with the peer device using Ethernet Autonegotiation Figure Figure 1 1 shows a DAG 3 6E series card Figure 1 1 A DAG 3 6E seri...

Страница 8: ...dependent 10 100 Ethernet interfaces Each can be connected to a separate switch or hub and autonegotiate with the connected equipment Ethernet framers Each single half or full duplex 10 or 100Mbps Eth...

Страница 9: ...t transmit onto this link at all and even if the DAG 3 6ET is turned off the network link integrity is assured Packet time stamping Serial Ethernet data is received by the interface and fed through a...

Страница 10: ...ot be more than two cards on a single PCI bus In this chapter This chapter covers the following sections of information Insert DAG 3 6E Card into PC Connecting DAG Card Ports 2 1 Insert DAG 3 6E Card...

Страница 11: ...2 1 Connect DAG 3 6EP Card Ports Description With the DAG 3 6EP there are two RJ45 ethernet ports that can be connected independently to any two Ethernet devices Typically the DAG card is connected t...

Страница 12: ...fter 3 6ET Straight Cables Switch Ethernet Switch Ethernet Figure 2 2 Typical DAG Card Connection Between a NIC and Switch Insertion between switches and routers Sometimes the DAG card may be inserted...

Страница 13: ...ver cable is referred to as the Switch Port A and Port B on the DAG 3 6ET are interchangeable it does not matter which of the ports each cable is connected to Pin jumpers There are a number of pin jum...

Страница 14: ...vity In this section This section covers the following topics of information DAG 3 6 EP Card Sensitivity DAG 3 6ET Card Sensitivity 3 1 1 DAG 3 6 EP Card Sensitivity Description The DAG 3 6EP card is...

Страница 15: ...hooting configuration options si should be passed to the tool to watch physical and framing layers operational status More details about the meaning of the various bits are supplied through the help p...

Страница 16: ...e Per Second Out indicates the card is sending a clock synchronisation signal LED 12 PPS In Pulse Per Second In indicates the card is receiving an external clock synchronisation signal 3 2 2 DAG 3 6ET...

Страница 17: ...ession Step 1 Check Cabling Ensure cabling is correctly connected and that RJ45 connectors are clipped into the sockets Step 2 Check link layer configuration Learn about the link layer configuration i...

Страница 18: ...x dag36epci erf bit dag endace dagld x d dag0 f xilinx dag36epp erf bit Step 5 Configure Card for Normal Use Configure according to local settings using dagthree default command NOTE If dagthree defau...

Страница 19: ...card status will include tap for each link line for the DAG 3 6ET and will contain port for each link line for the DAG 3 6EP These values are not software adjustable Step 2 Select Configuration Option...

Страница 20: ...tect 100Mbps only Lck PLL Lock 100Mbps only Neg Auto negotiation completed Auto mode only FC False Carrier Detected Error IS Invalid Symbol Detected Error HS Halt Symbol Detected Error PE Premature En...

Страница 21: ...nk Lck Neg FC IS HS PE RF JB 100 1 1 1 1 0 0 0 0 0 0 100 1 1 1 1 0 0 0 0 0 0 100 1 1 1 1 0 0 0 0 0 0 100 1 1 1 1 0 0 0 0 0 0 Network link fault corrective action A network link fault problem is indica...

Страница 22: ...G card s model and serial number 2 Host PC type and configuration 3 Host PC operating system version 4 DAG software version package in use 5 Any compiler errors or warnings when building DAG driver or...

Страница 24: ...irectory For a typical measurement session first move to the dag directory load the driver then load the Xilinx receive image to each DAG For example with one DAG 3 6E card installed tools dagrom rvp...

Страница 25: ...horter records saving bandwidth and storage space An example for full packet capture is dagthree d dag0 varlen slen 1536 NOTE In fixed length mode packets longer than selected slen truncate to slen bu...

Страница 26: ...fixed number of seconds and then exit with the s option 4 2 High Load Performance Description As the DAG card captures packets from the network link it writes a record for each packet into a large bu...

Страница 27: ...ed Increasing buffer size The host PC buffer can be increased to deal with bursts of high traffic load on the network link By default the dagmem driver reserves 32MB of memory per DAG card in the syst...

Страница 28: ...en DAG cards and coordinated universal time UTC Accurate time reference can be obtained from an external clock by connecting to the DAG card using the synchronisation connector or the host PCs clock c...

Страница 29: ...out sync timeout in seconds default 60 l threshold health threshold in ns default 596 Option default RS422 in none out none None in none out rs422in RS422 input hostin Host input unused overin Interna...

Страница 30: ...drifts smoothly at the same rate as the PC clock If a PC is running NTP to synchronize its own clock then the DUCK clock is less smooth because the PC clock is adjusted in small jumps However overall...

Страница 31: ...ately Synchronized then one card is configured as the clock master for the other Locking cards together Although the master card s clock will drift against UTC the cards are locked together The cards...

Страница 32: ...error Freq 691ppb Phase 394ns Worst Freq 143377ppb Worst Phase 88424ns crystal Actual 49999354Hz Synthesized 16777216Hz input Total 87464 Bad 0 Singles Missed 0 Longest Sequence Missed 0 start Wed Ap...

Страница 33: ...023Hz Synthesized 67108864Hz input Total 225 Bad 0 Singles Missed 1 Longest Sequence Missed 1 start Thu Apr 28 14 55 20 2005 host Thu Apr 28 14 59 06 2005 dag Thu Apr 28 14 59 06 2005 Connecting time...

Страница 34: ...8 Out B Figure Figure 6 1 shows the RJ45 plug and socket connector pin outs Figure 6 1 RJ45 Plug and Socket Connector Pin outs Out pin connections Normally the GPS input should be connected to the A c...

Страница 36: ...d as a byte stream no byte re ordering is applied Table Table 7 1 shows the generic variable length record The diagram is not to scale timestamp timestamp type flags rlen lctr wlen rlen 16 bytes of re...

Страница 37: ...record length Total length of the record transferred over PCI bus to storage Lctr loss counter A 16 bit counter recording the number of packets lost since the previous record Records can be lost betwe...

Страница 38: ...number representing seconds since midnight on the first of January 1970 The high 32 bits contain the integer number of seconds while the lower 32 bits contain the binary fraction of the second This a...

Страница 39: ...ntinued Description continued Example code Here is some example code showing how a 64 bit ERF timestamp erfts can be converted into a struct timeval representation tv unsigned long long lts struct tim...

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