1.1.6
Electrostatic Discharge
Electronic boards are sensitive to electrostatic discharge (ESD). Please ensure that the product is handled
with care and only in an ESD-protected environment.
1.1.7
Electromagnetic Compatibility
The KX2 FPGA module is a Class A product and is not intended for use in domestic environments.
The product may cause electromagnetic interference, for which appropriate measures must be taken.
1.2
Features
•
Xilinx Kintex-7 28 nm FPGA XC7K160T/XC7K325T/XC7K410T, FFG676/FBG676 package
•
256 user I/Os up to 3.3 V
•
216 FPGA I/Os (single-ended, differential or analog)
•
40 MGT signals (clock and data)
•
FBG package devices
: 8 MGTs @ 6.6 Gbit/sec and 4 reference input clock differential pairs
•
FFG package devices
: 8 MGTs @ 10.3125 Gbit/sec and 4 reference input clock differential pairs
•
PCIe Gen2
×
8 (Xilinx integrated PCIe block)
•
Up to 2 GB DDR3 SDRAM
•
64 MB quad SPI flash
•
FTDI USB 2.0 device controller
•
Dual Gigabit Ethernet
•
High-power 20 A core power supply
•
5 to 15 V supply voltage
1.3
Deliverables
•
KX2 FPGA module
•
KX2 FPGA module documentation, available via download:
•
KX2 FPGA Module User Manual (this document)
•
KX2 FPGA Module Reference Design [2]
•
KX2 FPGA Module IO Net Length Excel Sheet [3]
•
KX2 FPGA Module FPGA Pinout Excel Sheet [4]
•
KX2 FPGA Module User Schematics (PDF) [5]
•
KX2 FPGA Module Known Issues and Changes [6]
•
KX2 FPGA Module Footprint (Altium, Eagle, Orcad and PADS) [7]
•
KX2 FPGA Module 3D Model (PDF) [8]
•
KX2 FPGA Module STEP 3D Model [9]
•
Module Pin Connection Guidelines [10]
•
Mercury Master Pinout [11]
•
Enclustra Modules Heat Sink Application Note [15]
1.4
Accessories
1.4.1
Reference Design
The KX2 FPGA module reference design features an example configuration for the Kintex-7 FPGA
device, together with an example top level HDL file for the user logic.
A number of software applications are available for the reference design, that show how to initialize the
peripheral controllers and how to access the external devices. Pre-compiled binaries are included in the
archive, so that the user can easily check that the hardware is functional.
The reference design can be downloaded from the Enclustra download page [2].
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Version 06, 25.07.2019
