References
[1]
Enclustra General Business Conditions
http://www.enclustra.com/en/products/gbc/
[2]
KX2 FPGA Module Reference Design
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[3]
KX2 FPGA Module IO Net Length Excel Sheet
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[4]
KX2 FPGA Module FPGA Pinout Excel Sheet
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[5]
KX2 FPGA Module User Schematics
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[6]
KX2 FPGA Module Known Issues and Changes
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[7]
KX2 FPGA Module Footprint
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[8]
KX2 FPGA Module 3D Model (PDF)
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[9]
KX2 FPGA Module STEP 3D Model
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[10]
Module Pin Connection Guidelines
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[11]
Enclustra Mercury Master Pinout
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[12]
Hirose FX10 Series Product Website
http://www.hirose-connectors.com/
[13]
PE1 User Manual
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[14]
Enclustra Module Configuration Tool
http://www.enclustra.com/en/products/tools/module-configuration-tool/
[15]
Enclustra Modules Heat Sink Application Note
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[16]
7 Series FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital
Converter User Guide, UG480, Xilinx, 2015
[17]
7 Series FPGAs Configuration User Guide, UG470, Xilinx, 2015
[18]
Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics, DS182, Xilinx, 2015
[19]
Vivado Design Suite User Guide, Programming and Debugging, UG908, Xilinx, 2016
[20]
7 Series FPGAs Packaging and Pinout, Product Specification, UG475, v1.17, Xilinx
D-0000-430-002
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