
Embedian, Inc.
65
SMARC-iMX8M Computer on Module User’s Manual v.1.0
2.1.13 SPI/eSPI Interface
The
SMARC‐iMX8M
module supports two
NXP i.MX8M SPI
interfaces that
are available off‐Module for general purpose use. One of them is
implemented as
eSPI
interface by
SMARC 2.0
definition. Each
SPI
channel
has two chip‐selects that can connect two SPI slave devices on each channel.
SPI
devices will share the "
SPI0_DIN
", "
SPI0_DO
" and "
SPI0_CK
" pins, but
each device will have its own chip select pin. The chip select signal is a low
active signal.
eSPI
devices will share the "E
SPI_IO_0
", "
ESPI_IO_1
",
"
ESPI_IO_2
", "
ESPI_IO_3
" and "E
SPI_CK
" pins, but each device will have its
own chip select pin. The chip select signal is also a low active signal.
The
SPI
to
CAN
bus bridge uses the
SPI0
interface with different chip select
signals (
SS2#, SS#3
).
Содержание SMARC-iMX8M Series
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