Embedian SMARC-iMX8M Series, Руководство пользователя, Страница: 57 / 174

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SMARC-iMX8M Computer on Module User’s Manual v.1.0
2.1.11. MIPI/CMOS Serial Camera Interface (MIPI_CSI)
The NXP® i.MX8M provides connectivity to cameras via the MIPI/CSI‐2
transmitter and maintains image manipulation and processing with
adequate synchronization and control. The Camera Serial Interface (
CSI )
controls the camera port and provides interface to an image sensor or a
related device. The role of the camera ports is to receive input from video
sources and to provide support for time‐sensitive signals to the camera.
Non‐time‐sensitive controls such as configuration, reset are performed by
the ARM platform through I2C interface or GPIO signals.
The SMARC specification defines serial and parallel camera interface on the
same pins. We can either implement it as serial or parallel camera interfaces.
The camera interface on
SMARC‐iMX8M is designed as serial interfaces on
CSI0 pin groups that can support 4 lanes and CSI1 pin groups that can
support 2 lanes providing an interface between the system and the MIPI
D‐PHY, allowing communication with an MIPI CSI‐2 compliant camera
sensor.
The 4‐lane MIPI‐CSI2 supports 5M pixel at 15 fps, 1080p30, 720p60, VGA at
60 fps o Maximum bit rate of 1.5 Gbp.