Denon DRA-100, Руководство по обслуживанию

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Pin Name Function Description
115 C67GND - Ground
116 C67P3V3 - 3.3 V I/O supply (quiet)
117 CH6_FB1 Bidirectional, pull-up Channel 6 high resolution feedback input
or channel 6/7 I²S output bit clock
118 CH6_FB0 Bidirectional, pull-up Channel 6 low resolution feedback input
119 CH6_REF2 Output, tristate Channel 6 reference 2 output
120 CH6_REF1 Output, tristate Channel 6 reference 1 output
121 C6GND - Ground
122 C6P3V3 - 3.3 V I/O supply (quiet)
123 CH6_REF0 Output, tristate Channel 6 reference 0 output
124 C6P1V8 - 1.8 V core supply (quiet)
125 GND - Ground
126 P1V8 - 1.8 V core supply
127 CKO1P3V3 - 3.3 V I/O supply (quiet)
128 PWMCK1_OUT Output, tristate PWM triangle generator output channels
4, 5, 6, 7
129 CKO1GND - Ground
130 CKO1P1V8 - 1.8 V core supply (quiet)
131 MCK1_OUT_BAR Output, tristate 108 MHz Master clock bar output
channels 4, 5, 6, 7
132 MCK1_OUT Output, tristate 108 MHz Master clock output channels 4,
5, 6, 7
133 C5P1V8 - 1.8 V core supply (quiet)
134 CH5_REF0 Output, tristate Channel 5 reference 0 output
135 C5P3V3 - 3.3 V I/O supply (quiet)
136 C5GND - Ground
137 CH5_REF1 Output, tristate Channel 5 reference 1 output
Production Information
© 2012 Cambridge Silicon Radio Limited
This material is subject to CSR's non-disclosure agreement.
Page 20 of 181
CS-225959-DSP6
www.csr.com
CSRA6600
/
CSRA
6601
Direct Digital Feedback
A
m
plifier
Data Sheet
Pin Name Function Description
138 CH5_REF2 Output, tristate Channel 5 reference 2 output
139 CH5_FB0 Bidirectional, pull-up Channel 5 low resolution feedback input
or channel 4/5 I²S output word clock
140 CH5_FB1 Bidirectional, pull-up Channel 5 high resolution feedback input
or channel 4/5 I²S output data
141 C45P1V8 - 1.8 V core supply (quiet)
142 C45GND - Ground
143 C45P3V3 - 3.3 V I/O supply (quiet)
144 CH4_FB1 Bidirectional, pull-up Channel 4 high resolution feedback input
or channel 4/5 I²S output bit clock
145 CH4_FB0 Bidirectional, pull-up Channel 4 low resolution feedback input
146 CH4_REF2 Output, tristate Channel 4 reference 2 output
147 CH4_REF1 Output, tristate Channel 4 reference 1 output
148 C4GND - Ground
149 C4P3V3 - 3.3 V I/O supply (quiet)
150 CH4_REF0 Output, tristate Channel 4 reference 0 output
151 C4P1V8 - 1.8 V core supply (quiet)
152 CKIP1V8 - 1.8 V core supply (quiet)
153 CKIGND1 - Ground
154 MCK_IN Input/output 108 MHz Master clock input
155 CKIP3V3 - 3.3 V I/O supply (quiet)
156 MCK_IN_BAR Input/output 108 MHz Master clock bar input or Master
clock output
157 CKIGND2 - Ground
158 C3P1V8 - 1.8 V core supply (quiet)
159 CH3_REF0 Output, tristate Channel 3 reference 0 output
160 C3P3V3 - 3.3 V I/O supply (quiet)
Production Information
© 2012 Cambridge Silicon Radio Limited
This material is subject to CSR's non-disclosure agreement.
Page 21 of 181
CS-225959-DSP6
www.csr.com
CSRA6600
/
CSRA
6601
Direct Digital Feedback
A
m
plifier
Data Sheet
72