fig.05b
SDATA
Z2_SPDIF
Z3_SPDIF
OPT1
OPT2
COAX1
COAX2
Z3DIR_I2S
SPDIF_Z2HDMI
I2S/DSD_HDMIRX
SPDIF_HDMIRX
Z3DAC_I2S
Z2DAC_I2S
I2S_HDMIRX
DSD_HDMIRX
I2S_CX870/CY920
DSD_CX870/CY920
DLHD
DLHD
I2S_HDMITX
I2S_CX870/CY920
Z2DIR_I2S
I2S_HDMITX
I2S_CX870/CY920
DSD_CX870/CY920
CX870/CY920_VBUclk
CX870/CY920_VBUSdata(8bit)
CX870/CY920_VBUSdata(8bit)
CX870/CY920_VBUclk
SPDIF_HDMIRX
OPT2
OPT1
COAX2
COAX1
F
I
D
P
S
_
3
Z
I
M
D
H
2
Z
_
F
I
D
P
S
Z2_SPDIF
REFCLK
DIR_I2S
ADCCLK
DSP1_IN_LRCK
DSP1_IN
PLLOU
T
I2S/DSD_HDMIRX
I N P U T
SPDIF_HDMIRX
I N P U T
I2S_HDMITX
O U T P U T
COAX1
COAX2
OPT1
OPT2
SPDIF_Z2HDMI
I N P U T
ADIN_FL
I N P U T
ADIN_FR
I N P U T
Z2DA_L
O U T P U T
Z2DA_R
O U T P U T
Z3DA_L
O U T P U T
Z3DA_R
O U T P U T
1
2
1
2
1
2
1
2
1
2
DENONLinkHD
7
6
5
7
6
5
7
6
5
7
6
5
1
3
2
1
3
2
1
3
2
1
3
2
1
3
2
7
6
5
1
3
2
7
6
5
1
3
2
7
6
5
DA_FWR
O U T P U T
DA_FWL
O U T P U T
DA_FHR
O U T P U T
DA_FHL
O U T P U T
DA_SBR
O U T P U T
DA_SBL
O U T P U T
DA_SR
O U T P U T
DA_SL
O U T P U T
DA_RSV
O U T P U T
DA_SW2
O U T P U T
DA_SW1
O U T P U T
DA_C
O U T P U T
DA_FR
O U T P U T
DA_FL
O U T P U T
1
2
3
1
2
3
1
2
3
CX870/CY920_VBUclk
O U T P U T
CX870/CY920_VBUSdata(8bit)
O U T P U T
1
2
3
24.576MHz
DENON Link HD
Generator Module
ZONE2
Mute Logic
ZONE3
Mute Logic
1/2
Div.
1/4
Div.
1st DSP
7
8
4
1
2
-
P
S
D
A
7
8
4
1
2
-
P
S
D
A
3rd DSP
ADSP-21487
4th DSP
Main ZONE
Mute Logic
FCXO-05
Jitter Reducer PLL
CS2100
Main DIR
PCM9211
LC89091JH
ZONE2 DIR
LC89091JH
ZONE3 DIR
DSP1 INPUT MUX
ZONE2 I2S MUX
ZONE3 I2S MUX
MAIN ADC
AK5358B
ZONE2 DAC
PCM5100
ZONE2 DAC
PCM5100
MAIN DAC1
AK4490
MAIN DAC2
AK4490
Audio PLD
5M570ZF256C5N
DSP3 INPUT MUX
DAC INPUT MUX
SDRAM
FLASH
FLASH
H
S
A
L
F
M
A
R
D
S
M
A
R
D
S
AVR-X7200 DIGITAL AUDIO/NETWORK BLOCK DIAGRAM
fs Assign Sel.
25.0MHz
FCXO-05
CX870/CY920
Netowrk Module
iPod
Coprocessor
S.Flash
Wired Network
Input
USB-A
Wireless Network
Input
Input(FRONT)
From/To
VIDEO BL
O
CK DIAGRA
M
From/To
ANALOG A
U
DIO BLOCK DIAGRA
M
USB-A
Input(REAR)
AVR-X5200
AVR-X7200
AV8801
AVR-X7200
AV8801
AVR-X5200
AVR-X5200
AVR-X7200
Ref clock Sel.
DIGITAL PCB BLOCK
FLASH
ADSP-21487
2nd DSP
SDRAM
40
Содержание AVR-X7200W
Страница 8: ...Personal notes 8 ...
Страница 204: ...MX25L1606EM2I 12G DIGITAL U102 U202 U302 U402 MX25L1606EM2I 12G Block Diagram 8 PIN SOP 200mil 150mil BLOCK DIAGRAM 204 ...
Страница 210: ...NJW1194A INPUT U3203 U3204 BLOCK DIAGRAM 210 ...
Страница 211: ...2 FL DISPLAY FLD 17 BT 40GINK FRONT SPK Z6801 PIN CONNECTION GRID ASSIGNMENT Y2 q 211 ...
Страница 212: ...ANODE CONNECTION 212 ...