D i d o H a r d w a r e M a n u a l
v . 1 . 0 . 5
Table of Contents
1 Preface.....................................................................................................................................6
1.1 About this manual.............................................................................................................6
1.2 Copyrights/Trademarks.....................................................................................................6
1.3 Standards..........................................................................................................................6
1.4 Disclaimers.......................................................................................................................6
1.5 Warranty............................................................................................................................6
1.6 Technical Support.............................................................................................................7
1.7 Related documents...........................................................................................................8
1.8 Conventions, Abbreviations, Acronyms............................................................................8
2 Introduction.............................................................................................................................11
2.1 Product Highlights...........................................................................................................12
2.2 Block DiagramBlock Diagram.........................................................................................13
2.3 Feature Summary...........................................................................................................14
3 Design overview.....................................................................................................................16
3.1 “DaVinci” DM814x / “Sitara” AM387x CPU.....................................................................16
3.2 DDR3 memory bank.......................................................................................................18
3.3 NOR flash bank...............................................................................................................18
3.4 NAND flash bank............................................................................................................18
3.5 Memory Map...................................................................................................................19
3.6 Power supply unit...........................................................................................................19
3.7 CPU module connectors.................................................................................................19
4 Mechanical specifications......................................................................................................21
4.1 Board Layout...................................................................................................................21
4.2 Connectors......................................................................................................................23
5 System Logic..........................................................................................................................24
5.1 Power..............................................................................................................................24
5.2 PMIC...............................................................................................................................24
5.3 Reset...............................................................................................................................24
5.3.1 MRST (J2.102)........................................................................................................24
5.3.2 PORSTn (J2.109)....................................................................................................24
5.3.3 RSTOUTn (J2.91)....................................................................................................25
5.3.4 CPU_RESETn (J2.15).............................................................................................25
5.3.5 JTAG_TRSTn (J2.100)............................................................................................25
5.4 Voltage monitor...............................................................................................................25
5.5 Boot options....................................................................................................................25
5.5.1 Default boot configuration.......................................................................................26
5.5.2 Boot sequence customization.................................................................................27
5.6 Clock scheme.................................................................................................................27
5.7 Recovery.........................................................................................................................27
5.7.1 JTAG Recovery.......................................................................................................27
5.7.2 UART Recovery.......................................................................................................28
August, 2014
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