D i d o H a r d w a r e M a n u a l
v . 1 . 0 . 5
Processor DSP
3D
HDVICP HDVPSS Max clock
speed
AM3874
n.a.
Yes
n.a.
Yes
1 GHz
AM3872
n.a.
n.a.
n.a.
Yes
1 GHz
AM3871
n.a.
n.a.
n.a.
n.a.
1 GHz
Tab. 6
: DM814x/AM387x comparison
3.2
DDR3 memory bank
DDR3 SDRAM memory bank is composed by 4x 16-bit width
chips resulting in 2x 32-bit combined width banks.
The following table reports the SDRAM specifications:
CPU connection
SDRAM bus
Size min
128 MB
Size max
2 GB
Width
32 bit
Speed
533 MHz
Tab. 7
: DDR2 specifications
3.3
NOR flash bank
NOR flash is a Serial Peripheral Interface (SPI) device. By
default this device is connected to SPI channel 0 and acts as
boot memory.
The following table reports the NOR flash specifications:
CPU connection
SPI channel 0
Size min
4 MByte
Size max
128 MByte
Bootable
Yes
Tab. 8
: NOR flash specifications
3.4
NAND flash bank
On board main storage memory is a 8-bit wide NAND flash. By
default it is connected to GPMC_NCS0 chip select. Optionally it
August, 2014
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