Datexel DAT 6000 SERIES, Руководство пользователя

Страница: 15 / 20

DAT 6000
15
PRELIMINARY
Start condition:
ENABLE low and CLK low, then DATA is automatically low.
Initialization:
1 - ENABLE High
2 - Wait for Tr
Synchronism:
3 - CLK High
4 - Wait for Tr
5 - Read DATA
6 - DATA logic level must be 1 otherwise go to point 3 *
7 - CLK Low
8 - Wait for Tr
9 - Read DATA
10 - DATA logic level must be 0 otherwise go to point 3 *
Bit reading:
11 - CLK High
12 - Wait for Tr
13 - Read DATA
14 - CLK Low
15 - Wait for Tr
16 - Read DATA
17 - DATA logic level read on point 13 and on point 16 must be the same,
otherwise go to point 3 *
18 - Save the DATA logic level as bit in the reading register
Channel reading:
19 - Repeat points 11 to 18 for all the 16 bits of the measure, writing the bits
in the reading register from the most significant one down to the least
significant one
20 - Repeat points 11 to 19 for all the channels to read
21 - After the 16° bit of the last channel (2nd or 4th) return to point 3
To abort the reading without to read all the channels:
22 - Be sure the CLK is Low
23 - ENABLE Low
24 - Wait for Tr
25 - Go to point 1
* Synchronization is failed, then disregard the last reading. The data acquisition will
be delayed until the next synchronism bit will be recognized. It is advisable to abort
the reading procedure going to point 22.
NOTE: ‘Tr’ is the Debounce Filter time setting (1ms or 10 ms)
The correct procedure to acquire the measures by the module can be described
as following:
How to write the PLC’s instructions