12048321 Rev. 01 (Draft)
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4. Internal Connectors
4.1. SMARC Connector
Reference Designator: J1
Description
Socket and mechanical space including mounting holes and standoffs to support SMARC 2.0 / 2.1 modules
according to the standards specification Rev. 2.1.1
Interfaces provided (excluding unused interfaces)
PCI Express Ports A,B,C
USB 2.0 Ports 0,1,4,5
USB 3.0 Ports 2,3
GBE 0, 1
SATA
LVDS 0,1
DisplayPort 0
DisplayPort 1
SDIO
SPI0
eSPI as SPI1 (SPI Mode)
I2S0, HDA
SER 0, 1, 2, 3
CAN 0
I2C_GP
I2C_PM
12 GPIOs
Power- and System-Status signalling
Figure 10 SMARC Connector
– J1
Pinout (for more details about pinout , see to SMARC Specification 2.1.1)
Note: the input/output pin type/direction is described from the carrier board view.
Pin
Signal / Function
Pin Type
Signal Description
Device/Connection
P1
SMB_ALERT#
O (OD 1.8V-
5V)
SMBus Alert# (Interrupt) signal
J44 Feature
Connector and
Board Controller
STM32
P2
GND
GND
Connected to ground potential of the PCB
GND
P3
O DP D-PHY CSI1 differential clock input (point to point)
not connected on
CB
P4
CSI1_CK-
P5
GBE1_SDP
IO (CMOS
3.3V)
IEEE 1588 trigger signals (GBE[0]_SDP)
J58 (PicoBlade)
P6
GBE0_SDP
IO (CMOS
3.3V)
IEEE 1588 trigger signals (GBE[0]_SDP)
J58 (PicoBlade)