Cypress S29GL01GP, Руководство пользователя

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Document Number: 002-00886 Rev. *B Page 55 of 83
S29GL01GP
S29GL512P
S29GL256P
S29GL128P
Notes
1. V
IO
< V
CC
+ 200 mV.
2. V
IO
and V
CC
ramp must be synchronized during power up.
3. If RESET# is not stable for t
VCS
or t
VIOS
:
The device does not permit any read and write operations.
A valid read operation returns FFh.
A hardware reset is required.
4. V
CC
maximum power-up current (RST=V
IL
) is 20 mA.
Figure 11.8
Power-up Sequence Timings
Power-up Sequence Timings
Parameter Description Speed Unit
t
VCS
Reset Low Time from rising edge of V
CC
(or last Reset pulse) to
rising edge of RESET#
Min 35 µs
t
VIOS
Reset Low Time from rising edge of V
IO
(or last Reset pulse) to rising
edge of RESET#
Min 35 µs
t
RH
Reset High Time before Read Min 200 ns
V
CC
min
V
CC
V
IO
min V
IO
CE#
RESET#
t
RH
t
VIOS
t
VCS