Cypress EZ-PD CCG2 Development Kit, Руководство пользователя

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Hardware
CY4502 EZ-
PD™ CCG2 Development Kit Guide, Doc. No. 001-96601 Rev. *G
29
4.5 20-pin Header
The CY4502 board contains one 20-pin header, J9, that is not mounted on the DVK.
The CCG2 GPIOs and I
2
C lines are exposed on the 20-pin header ( Figure 4-7 ). The R
D
line from U1, VCONN, and CC
lines are also accessible as test points for debugging.
Figure 4-7. 20-Pin Header