C
URTISS
-W
RIGHT
C
ONTROLS
E
MBEDDED
C
OMPUTING
814256 V
ERSION
2 F
EBRUARY
2006
A-23
J22 C
ONNECTOR
Table A.16 lists the pin assignments for the connector referenced J22. This connector is part
of PMC site #2, and is referenced as Pn2/Jn2 in the PMC specification IEEE 1386.1-2001.
T
ABLE
A.16:
J22 Connector Description (Pn2/Jn2 64-bit PCI)
Pin No. Signal Name
Direction
Description
Electrical
Characteristics
1
+12V
N/A
+12V Supply
+12V
2
TRST*
O
JTAG Reset
PCI/PCI-X
3
TMS
I
JTAG Test Mode Select
PCI/PCI-X
4
TDO
O
JTAG Test Data Out
PCI/PCI-X
5
TDI
I
JTAG Test Data In
PCI/PCI-X
6
GND
N/A
GND
GND
7
GND
N/A
GND
GND
8
RESERVED
N/A
RESERVED
N/A
9
RESERVED
N/A
RESERVED
N/A
10
RESERVED
N/A
RESERVED
N/A
11
BUSMODE2
O
Basecard indicates PCI protocol used for PMC
interface, by driving this line high
PMC/PPMC
12
+3.3V
N/A
Positive Supply
+3.3V
13
RST*
O
PCI Reset Signal
PCI/PCI-X
14
BUSMODE3
O
Basecard indicates PCI protocol used for PMC
interface, by driving this line low
PMC/PPMC
15
+3.3V
N/A
Positive Supply
+3.3V
16
BUSMODE4
O
Basecard indicates PCI protocol used for PMC
interface, by driving this line low
PMC/PPMC
17
RESERVED
N/A
RESERVED
N/A
18
GND
N/A
GND
GND
19
AD[30]
I/O
PCI Address/Data Bus
PCI/PCI-X
20
AD[29]
I/O
PCI Address/Data Bus
PCI/PCI-X
21
GND
N/A
GND
GND
22
AD[26]
I/O
PCI Address/Data Bus
PCI/PCI-X
23
AD[24]
I/O
PCI Address/Data Bus
PCI/PCI-X
24
+3.3V
N/A
Positive Supply
+3.3V
25
IDSEL
O
PCI Initialisation Device Select for PMC Site #2
PCI/PCI-X
26
AD[23]
I/O
PCI Address/Data Bus
PCI/PCI-X
27
+3.3V
N/A
Positive Supply
+3.3V
28
AD[20]
I/O
PCI Address/Data Bus
PCI/PCI-X
29
AD[18]
I/O
PCI Address/Data Bus
PCI/PCI-X
30
GND
N/A
GND
GND
31
AD[16]
I/O
PCI Address/Data Bus
PCI/PCI-X
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