Creotech FMC masterFIP Скачать руководство пользователя страница 19

- 18 -

 

 

 

Functionality test

 

Test 00 

 

Firmware loading 

 

FMC presence 

 

Verification of speed version  

o

 

User is asked to visually verify mounting of resistors R47, R48, R52 and R53 that are used 
to indicate the speed version 

o

 

Mounting is compared with speed identification detected by FPGA on the SPEC board 

o

 

User is asked to verify if detected speed version matches the expected one  

Possible errors: 

 

More than one SPEC was found  

o

 

Make sure that only one SPEC device is mounted in the test PC. 

 

No SPEC device was found 

 

SPEC enumeration failed 

o

 

Make sure that SPEC device was mounted properly. 

o

 

Make sure that all software was successfully build. 

o

 

Make sure that all drivers were loaded successfully. 

 

Firmware loader failure 

 

No access to masterfip core 

 

Wrong bitstream type loaded 

o

 

Make sure that installation procedure was done according to specification 

 

FMC slot NOT populated 

o

 

Make sure that FMC board is mounted correctly 

o

 

Check FMC soldering 

 

Resistors mount 

o

 

According  to  the  operator’s  visual  verification  some  resistors  are  not  mount  but  are 
detected by SPEC FPGA 

o

 

Might  be  caused  by  human  error  or  shorting  of  traces  leading  to  speed  indicating 
resistors 

Test 01 

Test01 verifies soldering of the FMC masterFIP front panel LED’s. The user is asked to visually verify if all 
LED’s are blinking one after the other. 

Possible errors: 

 

Some LED’s may be constantly on or off. 

o

 

Make sure that LED’s are mounted correctly. 

o

 

Make sure the FMC connector is well soldered. 

 

 

Содержание FMC masterFIP

Страница 1: ...FMC masterFIP Production Test Suite User Manual Creotech Instruments SA Jan 2018 Version 4 0...

Страница 2: ...name ipmi part EDA 03098 V4 3 0 08 03 2017 Marek Gumi ski Update to board version V3 removed ADC tests modified EXT_SYNC tests 2 0 16 11 2016 Evangelia Gousiou Changes for V2 version of the board remo...

Страница 3: ...1 Introduction 3 2 FMC masterFIP Board Functionality 9 3 PTS Functionality Tests 10 4 Log files retrieval 11 5 Custom cable preparation 12 6 First Time Setup 13 7 Testing Procedure 15 8 Common Causes...

Страница 4: ...signed for the Open Hardware Repository but it proved to be adaptable to other boards It assures that the boards comply with a minimum set of quality rules in terms of soldering mounting and fabricati...

Страница 5: ...tom cable Schematic shown in Figure 9 picture of real component in Figure 6 1x LEMO miniDsub9 custom cable Schematic shown in Figure 9 picture of real component in Figure 6 nanoFIPDiag nanoFIPdiag ver...

Страница 6: ...The SPEC carrier board provides access to the PCIe interface of the computer The computer hosts the FMC masterFIP PTS software which provides the automated testing environment Figure 2 SPEC DAC DDS c...

Страница 7: ...o automate cable reconnections Figure 4 USB relay box 1 The nanoFIPdiag is used to verify the WorldFIP bus communication by answering to WorldFIP question frames Note that the nanoFIPdiag speed versio...

Страница 8: ...7 Custom cables are used to connect the FMC masterFIP to the nanoFIPdiag via the USB relay box Figure 6 Custom cables One standard Lemo00 Lemo00 cable is also required Any length may be used...

Страница 9: ...tervention needs to be done by the operator e g scan the board s barcode check the font panel LED the interventions are explicitly signaled by the FMC masterFIP PTS software and this manual At the end...

Страница 10: ...t in 2009 it was decided to insource this technology at CERN Figure 8 Bottom top and front views of the masterFIP board The FMC masterFIP mezzanine board is tested while mounted on a SPEC carrier boar...

Страница 11: ...ed for all the tests loaded at test00 Table 4 List of tests Test Short Description Operator s Intervention 00 Loads firmware tests mezzanine presence verify speed version Yes 01 Test front panel LED s...

Страница 12: ...ory key in to the computer o Wait until Ubuntu mounts automatically the device o Using the file explorer navigate to Desktop masterFIP_log fmcmasterfip directory o Select all the zip files right click...

Страница 13: ...re is no need to use the WorldFIP protocol specified cable The following schematics are made with following markings yellow box connector type is given inside the box green box pins of Dsub connector...

Страница 14: ...uter cover Confirm that the USB relay box is mounted on the upper side of the computer cover Figure 10 Top side of the computer cover 3 Screw the SPEC board on the top side of the computer cover as Fi...

Страница 15: ...nment through the following commands Please note that the test environment may be installed in any path The installation sequence then makes sure that the top directory is called fmcmasterfip test env...

Страница 16: ...diag speed version should match the masterFIP speed version Connecting Dsub9 LEMO cable o connect the Dsub9 plug to the nanoFIPdDiag o connect the Positive LEMO plug to CH5 of the USB Relay Box o conn...

Страница 17: ...for a second barcode in case the manufacturer has a different serial number system Scan the second barcode and press ENTER or if there is none just press ENTER The program will automatically execute t...

Страница 18: ...rding issues that might affect each test USB calibration box not detected Verify that the USB cable is well connected between the PC and the box itself Verify with lsmod that the cp210x driver is moun...

Страница 19: ...uild o Make sure that all drivers were loaded successfully Firmware loader failure No access to masterfip core Wrong bitstream type loaded o Make sure that installation procedure was done according to...

Страница 20: ...e masterFIP sends an ID_DAT 147F which triggers the nanoFIPdiag to reply with an RP_DAT The fd_txer_i line is expected to be inactive during this transmission and reception In the FPGA a counter is co...

Страница 21: ...The table below describes the series of tests performed regarding the SN74LVC8T245PW IC1 and its associated pins In bold we highlight the signal that mostly defines the output During all tests FPGA I...

Страница 22: ...t in Hi Z state with internal pulldown If switching buffer direction didn t work value read from FPGA IO would follow USB Relay Box voltage as shown in previous tests EXT_SYNC_DIR line checked Possibl...

Страница 23: ...al SERIAL part EDA 03098 V4 SPEED o name FmcMasterFip o speed number from 0 31 25k speed version to 3 5M speed version Possible errors EEPROM communication EEPROM content o EEPROM might be broken or b...

Отзывы: