CPWR-AN26, Rev A, 08-2018
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The information in this document is subject to change without notice.
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As shown in Figure 2, the Input AC voltage is connected to terminals 1 and 3 of CON5 followed
by the fuse F1 and MOV (Metal Oxide Varistor) RV1. Differential mode filters L1 and L2 and
common mode filter XL1 are then connected, and the filters are followed by a low frequency
rectifier BD1 which charges the output DC link capacitors through positive temperature
coefficient (PTC) resistors RV1 and RV2. RV1 and RV2 are shorted by relay, if the DC link voltage
crosses the peak value of the input grid voltage, then rectifier BD1 becomes reverse biased and
no current flows through the rectifier BD1. The main PFC inductor L3 is connected after the relay.
The other end of L3 is connected to the midpoint of the high frequency half bridge Totem-Pole
MOSFETs Q1, Q2, Q3, and Q4. After passing through the differential and common mode filters,
the neutral point of the grid is connected to the low frequency half bridge Q5, Q6, Q7, and Q8.
The DC link capacitor bank consists of 18 pieces of 250 µf, 400 V capacitors connected in series
and parallel combination. There are some film capacitors and RC snubber circuits as well to
absorb the high frequency ripple and reduce EMI (Electromagnetic Interference).
The DC link is connected to an H-bridge comprised of MOSFETs Q9, Q10, Q11, and Q12 which
forms the primary side of the bi-directional CLLC converter. The resonance tank is composed of
an inductor (L4) and a resonance capacitor bank of 12 pieces of 4.7nF film capacitor. The
inductance of main CLLC transformer is 100 µH with a PQ5050 core. The secondary side of
PQ5050 core is connected to the secondary side resonance inductor L5 and a bank of 18 pieces
of secondary side resonance capacitors. The secondary side H-bridge is composed of MOSFETs
Q13, Q14, Q15, and Q16 followed by film capacitors C58 and C59 and an electrolytic capacitor.
As shown in Figure 3, the gate drive signals for the MOSFETs of the PFC stage and the resonance
stage are generated by the DSP (Digital Signal Processing) controller and each MOSFET is further
isolated by their respective gate drivers. There are separate isolated DC/DC (VIN = +15, VOUT =
+15V, -3V) supplies for all gate drivers. The input currents and output load currents are sensed
by a current sensor for processing in the DSP controller. All voltage sensing (grid as well as the
output voltage) signals are isolated with an analog optocoupler before being fed into the DSP
controller for further processing.
