CDM-625A Advanced Satellite Modem
MN-CDM625A
Appendix P
Revision 4
P–6
P.4.1 IDR Primary Data Interfaces
When configured for IDR operation, the board performs these functions:
•
It receives and performs clock and data recovery on incoming G.703 T1 and E1 pseudo-
ternary data.
•
It performs clock dejitter per G.823 and G.824, and also accomplishes any data decoding
(AMI, B8Z5, or HDB3) required per G.703.
•
It performs IDR Framing.
•
It multiplexes in compliance with the standard IESS-308 96 kbps ESC overhead onto the data
and provides both the data and rate-exchanged clock to the modulator portion of the base
modem.
•
It performs the corresponding demultiplexing of Rx satellite data received from the
demodulator portion of the modem. Resulting G.703 data is optionally encoded (AMI, B8ZS,
or HDB3) before being output.
P.4.2 IDR Engineering Service Channel
•
It provides for bidirectional processing of the components of the ESC channel, including the
ADPCM audio channels, 8 kbps data channel, and fault indications specified by IESS-403 and
IESS-308.
•
It provides the option of using the ADPCM portion of the satellite overhead for a single 64
kbps ESC data channel in addition to (and with the same format as) the 8 kbps data channel.
•
When using G.703 format for the primary IDR data path, the P3B primary data interface (25-
pin) is used for the 8kbps overhead channel. If EIA-422 or V.35 is used, P3B becomes the
primary interface and the 8kbps channel is unavailable.
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