CS5460A
DS284PP4
13
2.1.3 Digital Compensation Filters
The data from both channels is then passed through
two FIR compensation filters, whose purpose is to
compensate for the magnitude roll-off of the
low-pass filtering operation (mentioned earlier).
2.1.4 Digital High-Pass Filters
Both channels provide an optional high-pass filter
(denoted as “HPF” in Figure 3) which can be en-
gaged into the signal path, to remove the DC content
from the current/voltage signal before the RMS/en-
ergy calculations are made. These filters are activat-
ed by enabling certain bits in the Configuration
Register.
If the user wants to engage the high-pass filter in
only one of the two channels, then the all-pass filter
(see “APF” in Figure 3) will be enabled on the oth-
er channel, in order to preserve the relative phase
relationship between the voltage-sense and cur-
rent-sense input signals. For example, if the HPF is
engaged for the voltage channel, but not the current
channel, then the APF will be engaged in the current
channel, to nullify the additional phase delay intro-
duced by the high-pass filter in the current channel.
2.1.5 Overall Filter Response
When the CS5460A is driven with a 4.096 MHz
clock (K=1), the composite magnitude response
(over frequency) of the voltage channel’s input fil-
ter network is shown in Figure 4, while the com-
posite magnitude response of the current channel’s
input filter network is given in Figure 5. Note that
the composite filter response of both channels
scales with MCLK frequency and K.
2.1.6 Gain and DC Offset Adjustment
After the filtering, the instantaneous voltage and
current digital codes are both subjected to off-
set/gain adjustments, based on the values in the DC
offset registers (additive) and the gain registers
(multiplicative). These registers are used for cali-
bration of the device (see Section 4.8, Calibration).
After offset and gain, the 24-bit instantaneous data
sample values are stored in the Instantaneous Volt-
age and Current Registers, from which the user can
read out the data samples (via the serial interface).
2.1.7 Real Energy and RMS Computations
The digital instantaneous voltage and current data
is then processed further. Referring to Figure 3, the
instantaneous voltage/current data samples are
multiplied together (one multiplication for each
pair of voltage/current samples) to form instanta-
neous (real) power samples. After each A/D con-
version cycle, the new instantaneous power sample
is stored (and can be read by the user) in the Instan-
taneous Power Register.
The instantaneous power samples are then grouped
into sets of N samples (where N = value in Cycle
Count Register). The cumulative sum of each suc-
cessive set of N instantaneous power is used to
compute the result stored in the Energy Register,
which will be proportional to the amount of real en-
ergy registered by the device during the most recent
N A/D conversion cycles. Note from Figure 3 that
the bits in this running energy sum are right-shifted
12 times (divided by 4096) to avoid overflow in the
Energy Register. RMS calculations are also per-
formed on the data using the last N instantaneous
voltage/current samples, and these results can be
read from the RMS Voltage Register and the RMS
Current Register.
2.2 Performing Measurements
To summarize Section 2.1, the CS5460A performs
measurements of instantaneous current and instan-
taneous voltage, and from this, performs computa-
tions of the corresponding instantaneous power, as
well as periodic calculations of real energy, RMS
current, and RMS voltage. These measurement/cal-
culation results are available to the user in the form
of 24-bit signed and unsigned words. The scaling
of all output words is normalized to unity
full-scale. Note that the 24-bit signed output words
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