Total Solution for Industrial Automation
11
PWM Output Module User’s manual
3.2
Buffer Memory
The PWM output module is equipped with shared memories inside to exchange the
data with CPU. One of these is called buffer memory, which is a collection of word
(16Bit)-unit data. This buffer memory is readable and configurable on scan program,
using FROM
∙
FROMP/TO
∙
TOP instructions. Please refer to the Appendix 1 to get
information about FROM
∙
FROMP/TO
∙
TOP instructions.
The PWM output module offers 64words of buffer memory in total. Following table
shows the meaning and usage of each data.
OFFSET
Item
Set-up value
parameter
Initial
value
Access
0
PWM output Enable
BIT #0~#11
(Total 12
channels)
0
R/W
1
CH1,2,3,4 Frequency
0~4000(pps)
0
R/W
2
CH5,6,7,8 Frequency
0~4000
0
R/W
3
CH9,10,11,12 Frequency
0~4000
0
R/W
4
Available Later
5
CH1,2,3,4 Frequency ramp control time(x10ms)
Ex) When Frequency ramp control time is set to 100,
100 x 10ms = 1,000ms (1sec)
0~65535
(x 10ms)
0
R/W
6
CH5,6,7,8 Frequency ramp control time(x10ms)
0~65535
0
R/W
7
CH9,10,11,12 Frequency ramp control time(x10ms)
0~65535
0
R/W
8
Available Later
9
Available Later
10
CH1 duty cycle ratio
Ex) When duty cycle ratio is set to 100, 100 x 0.1%
= 10.0%
0~1000
(x 0.1%)
0
R/W
11
CH2 duty cycle ratio
0~1000
0
R/W
12
CH3 duty cycle ratio
0~1000
0
R/W
13
CH4 duty cycle ratio
0~1000
0
R/W
14
CH5 duty cycle ratio
0~1000
0
R/W
15
CH6 duty cycle ratio
0~1000
0
R/W
16
CH7 duty cycle ratio
0~1000
0
R/W
17
CH8 duty cycle ratio
0~1000
0
R/W
18
CH9 duty cycle ratio
0~1000
0
R/W
19
CH10 duty cycle ratio
0~1000
0
R/W
