5 : T h e o r y o f O p e r a t i o n
CHRISTIE INC. -
CHRISTIE INC. - 35/70 Service/PM Manual
July, 1997
The CPU/Main Logic Card (2293)
The CPU/Main Logic card (card 2293) contains:
•
the 6809 microprocessor (CPU)
•
parallel interface adapters (PIAs)
•
the control read-only memory (ROM) that contains the program
•
the RS-232 asynchronous communication interface adapter (ACIA) chip for serial
communication
•
the programmable timer module (PTM) chip that generates the clock rates for the ACIA and
motor circuits
•
the scratch pad random access memory (RAM)
•
the digital-to-analog converters (DACs) that allow the CPU to generate motor drive voltages
•
Erasable Programmable Logic Devices (EPLDs) that contain complementary metallic oxide
semiconductor (CMOS) logic elements, such as gates and flip-flops.
•
Control Circuitry, much of which is described in Section 5.1.
T h e C P U S e c t i o n
The CPU section of card 2293, illustrated in Section 8.7, uses a 6809 processor with a built-in crystal oscillator. The CPU
section is shown in the diagram of Figure 5.11. The computer program resides in a single 27128 EPROM, designated U2
in the circuit diagram. U1 is an 8192-byte RAM. U4, U10, and U37 are PIAs, used to communicate with the EPLDs and
DACs, and for sensing and controlling bilevel inputs and outputs. U7 is the ACIA, which communicates with the show
controller, or with the terminal for troubleshooting, across the RS-232 interface. U9 shifts the 0- to 5-volt output of the
ACIA to ±15 volts, as required for an RS-232 interface. U8 shifts incoming 12-volt levels to 0 - 5 volts for the ACIA.
The PTM divides the CPU clock to 153.6 KHz, as required for the ACIA, and scales other rates for motor drive circuits.
The ACIA communicates at 9600 baud.
