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Document type: 

Title: 

Revision date: 

Revision: 

User's Manual (MUT) 

 Mod. V2718 VME PCI Optical Link Bridge 

03/07/2018 

11 

 
 
 

NPO: 

Filename: 

Number of pages: 

Page: 

00106/03:V2718.MUTx/11 

V2718_REV11.DOC 

79 

13 

 

2.1.1.  Fair and Demand Request modes 

The  V2718  produces  requests  on  all  VME  bus  request  levels:  BR3*,  BR2*,  BR1*,  and 
BR0*.  The  default  setting  is  for  level  3  VME  bus  request.  The  request  level  is  a  global 
programming  option  set  through  the  Bus  Request  field  in  the  Control  register  (see 
§ 

2.13.2

).  

The  programmed  request  level  is  used  by  the  VME  bus  Master  Interface  regardless  of 
the channel currently accessing the VME bus Master Interface. 
The Requester may be programmed for either Fair or Demand mode. The request mode 
is a global programming option set through the Requester Type bit in the Control register. 
In 

Fair mode

, the V2718 does not request the VME bus until there are no other VME bus 

requests pending at its programmed level. This mode ensures that every requester on an 
equal level has access to the bus. 
In 

Demand  mode

,  the  requester  asserts  its  bus  request  regardless  of  the  state  of  the 

BRn* line. By requesting the bus frequently, requesters far down the daisy chain may be 
prevented  from  ever  obtaining  bus  ownership.  This  is  referred  to  as  “starving”  those 
requesters.  Note  that  in  order  to  achieve  fairness,  all  bus  requesters  in  a  VME  bus 
system must be set to Fair mode. 

2.1.2.  VME bus Release 

The Requester can be configured as either RWD (release when done) or ROR (release 
on request)  using the Release Type bit  in the Control register. The default setting is for 
RWD:  the  bus  is  released  as  soon  as  the  VME  access  is  terminated;  in  case  of 
BLT/MBLT  cycles,  the  access  is  terminated  either  when  the  N  required  bytes  are 
transferred  (although  the  cycle  is  divided  into  several  blocks  according  to  the  VME 
boundaries) or when BERR* is asserted. ROR means the master releases BBSY* only if 
a bus request is pending from another VMEbus master and once the channel that is the 
current  owner  of  the  VME  bus  Master  Interface  is  done.  Ownership  of  the  bus  may  be 
assumed  by  another  channel  without  re-arbitration  on  the  bus  if  there  are  no  pending 
requests on any level on the VME bus. 

2.2.  Addressing capabilities 

V2718  generates  A16,  A24,  A32,  CR/CSR  and  LCK  address  phases  on  the  VME  bus. 
Address  Modifiers  of  any  kind  (supervisor/non-privileged  and  program/data)  are  also 
programmed  through  the  PCI  bus:  the  V2718  does  not  handle  the  AM:  the  PC  Host 
passes  them  via  PCI  as  VME  cycle  parameters.  The  AM  broadcasting  depends  on  the 
PC drivers. 
The master generates ADdress-Only-with-Handshake (ADOH) cycles in support of lock 
commands for A16, A24, and A32 spaces. 

 
Supported addressing: 

A16, A24, A32, CR/CSR 

 

for R/W, RMW, ADO and ADOH 

A16, A24, A32 

 

 

for BLT 

A16, A24, A32 

 

 

for MBLT 

ADO 

 

 

 

Address Only 

ADOH 

 

 

 

Address Only with Handshake 

 

Содержание V2718

Страница 1: ...Technical Information Manual MOD V2718 VX2718 July 03rd 2018 Revision n 11 VME PCI OPTICAL LINK BRIDGE MANUAL REV 11 NPO 00106 03 V2718 MUTx 11...

Страница 2: ...uracies CAEN SpA reserves the right to modify its products specifications without giving any notice for up to date information please visit www caen it MADE IN ITALY We remark that all our boards have...

Страница 3: ...2 10 BUS TIMER 18 2 11 IACK DAISY CHAIN DRIVER 19 2 12 VME64X CYCLES NOT YET IMPLEMENTED 19 2 13 INTERNAL REGISTERS 20 2 13 1 Status register 21 2 13 2 Control register 22 2 13 3 Firmware Revision reg...

Страница 4: ...Coincidence 42 3 6 4 Input Output Register 42 3 7 I O INTERNAL CONNECTIONS 43 3 8 VME DATAWAY DISPLAY 44 3 9 FIRMWARE UPGRADE 46 3 10 V2718 TECHNICAL SPECIFICATIONS TABLE 49 4 SOFTWARE OVERVIEW 50 4 1...

Страница 5: ...4 3 29 CAENVME_SetRequesterType 69 4 3 30 CAENVME_SetReleaseType 69 4 3 31 CAENVME_SetBusReqLevel 70 4 3 32 CAENVME_SetTimeout 70 4 3 33 CAENVME_SetFIFOMode 70 4 3 34 CAENVME_GetArbiterType 71 4 3 35...

Страница 6: ...ESS HIGH REGISTER 32 FIG 28 DISPLAY ADDRESS LOW REGISTER 32 FIG 29 DISPLAY DATA HIGH REGISTER 33 FIG 30 DISPLAY CONTROL LEFT REGISTER 33 FIG 31 DISPLAY CONTROL LEFT REGISTER 33 FIG 32 LOCATION MONITOR...

Страница 7: ...e Number of pages Page 00106 03 V2718 MUTx 11 V2718_REV11 DOC 79 7 TABLE 1 1 AVAILABLE ITEMS 9 TABLE 1 2 CONET CABLES SPECIFICATIONS 11 TABLE 2 1 ADDRESS MAP FOR THE MODEL V2718 16 TABLE 2 2 REGISTERS...

Страница 8: ...VME64X type crate the Mod VN2738 is the VNX9 9 Unit mechanics version of the module and requires a VNX9 type crate In the present manual the generic term V2718 refers to all versions except as otherwi...

Страница 9: ...2705 yes yes VME6U WKX2718XBAAA VX2718KITB VME PCI Bridge VX2718 PCIe Optical Link A3818A Optical Fibre 5m duplex AY2705 yes yes VME64X WV2718LCXAAA V2718LC VME PCI Bridge no no VME6U WV2718XAAAAA V27...

Страница 10: ...PGA FIRMWARE USER DEFINED BOOT LOAD STD BCK FW A2818 LOCAL BUS INTERFACE PCI BUS FPGA PLX 9054 PCI INTERFACE 256K SRAM BUFFER 4Mbit FLASH FPGA FIRMWARE USER DEFINED STD BCK FW uC BOOT LOAD CONET Optic...

Страница 11: ...m 2 LC Simplex I 20 20 m 2 LC Simplex I 5 5 m 2 LC Simplex I 3 30 cm 2 LC Simplex If the network is composed by one A2818 or A3818 and only one V2718 then it is suggested to use X type cables such ca...

Страница 12: ...is used to implement the VME bus Lock command allowing the PC Host to lock VME bus resources 2 1 VME bus Requester Fig 3 Internal Arbitration for VME bus Requests When the V2718 operates as VME bus R...

Страница 13: ...airness all bus requesters in a VME bus system must be set to Fair mode 2 1 2 VME bus Release The Requester can be configured as either RWD release when done or ROR release on request using the Releas...

Страница 14: ...ing way D16_swapped Byte0 Byte1 Byte1 Byte0 D32_swapped Byte0 Byte3 Byte1 Byte2 Byte2 Byte1 Byte3 Byte0 D32_swapped Byte0 Byte7 Byte1 Byte6 Byte2 Byte5 Byte3 Byte4 Byte4 Byte3 Byte5 Byte2 Byte6 Byte1...

Страница 15: ...00106 03 V2718 MUTx 11 V2718_REV11 DOC 79 15 2 5 Cycle terminations The V2718 accepts BERR or DTACK as cycle terminations BERR is handled as cycle termination whether it is produced by the V2718 itse...

Страница 16: ...d by another master i e a V2718 cannot address itself as a slave for accessing the Dataway Display internal registers and a Test RAM 32 x 16 The V2718 is accessed both with A32 and A24 base address se...

Страница 17: ...0 lines be driven high during reset This means that if a board is preceded by another board in the VME bus system it will always sample BG3IN high after reset BG3IN can only be sampled low after reset...

Страница 18: ...2 1 Fixed Priority Arbitration Mode PRI In this mode the order of priority is BR 3 BR 2 BR 1 and BR 0 as defined by the VME64 specification The Arbitration Module issues a Bus Grant BGO 3 0 to the hi...

Страница 19: ...IACK Daisy Chain Driver it drives low the IACKOUT line of the first slot thus starting the chain propagation as soon as it detects an Interrupt Acknowledge cycle by an Interrupt Handler that could be...

Страница 20: ...rite only 11 Front panel output register clear IN_MUX_C 11 write only 12 Input multiplexer clear OUT_MUX_C 12 write only 15 Output multiplexer clear LED_POL_C 13 write only 7 LED polarity clear PULSEA...

Страница 21: ...ntains information on the status of the module 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SYSTEM RESET SYSTEM CONTROL FLASH READY DTACK BERR DIPSWITCH 0 DIPSWITCH 1 DIPSWITCH 2 DIPSWITCH 3 DIPSWITCH 4 USB...

Страница 22: ...REQUESTER_TYPE RELEASE_TYPE BUS_REQ_LEVEL INTERRUPT_REQ SYS_RES BUS_TIMEOUT ADDR_INCREMENT Fig 7 Control Register Arbiter Type 0 Fixed Priority 1 Round Robin Requester Type 0 Fair 1 Demand Release Ty...

Страница 23: ...gister is reserved for internal use only 2 13 6 IRQ Status register Base Address 0x05 D16 read only This register allows to monitor the IRQ lines status 1 Active 0 Inactive Fig 9 IRQ Status register 2...

Страница 24: ...ter carries the input register pattern Fig 11 Input register 2 13 9 Output set register Base Address 0x0A D16 read write This register allows to set the output register pattern 1 set 0 leave previous...

Страница 25: ...106 03 V2718 MUTx 11 V2718_REV11 DOC 79 25 2 13 10 Output clear register Base Address 0x10 D16 write only This register allows to clear the output register pattern 1 Clear 0 leave previous setting Fig...

Страница 26: ...ing Fig 14 Input Multiplexer register INPUT POLARITY 0 Direct 1 Inverted PULSER START SOURCE 00 SYSRES Button short pressure or Software 01 IN_0 10 IN_1 11 IN_0 OR IN_1 PULSER A RESET SOURCE 0 Output...

Страница 27: ...27 2 13 12 Input Multiplexer Clear register Base Address 0x11 D16 write only This register allows to clear the Input Multiplexer settings 1 Clear 0 leave previous setting Fig 15 Input Multiplexer regi...

Страница 28: ...E 00 Data Strobe 01 Input 0 AND Input 1 10 Pulser A Output 11 Output Register OUTPUT_1 SOURCE 00 Address Strobe 01 Input 0 AND Input 1 10 Pulser A Output 11 Output Register OUTPUT_2 SOURCE 00 Data Ack...

Страница 29: ...utput Multiplexer settings 1 Clear 0 leave previous setting Fig 17 Output Multiplexer Set register 2 13 15 LED Polarity set register Base Address 0x0D D16 read write This register allows to set the LE...

Страница 30: ...register 2 13 17 Pulser A 0 register Base Address 0x16 D16 read write This register allows to set the period and width of the relevant Pulser measured in range steps see 2 13 18 15 14 13 12 11 10 9 8...

Страница 31: ...9 8 7 6 5 4 3 2 1 0 PERIOD WIDTH Fig 22 Pulser B 0 register 2 13 20 Pulser B 1 register Base Address 0x1A D16 read write This register allows to set the number of pulses and the range of the relevant...

Страница 32: ...Base Address 0x20 D16 read only This register allows to monitor the LED Display Address bits 15 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DISP_AD 15 0 Fig 26 Display Address Low register 2 13 24 Display...

Страница 33: ...DISP_DATA 31 16 Fig 29 Display Data High register 2 13 27 Display Control Left register Base Address 0x24 D16 read only This register allows to monitor the LED Display Control Left bar 15 14 13 12 11...

Страница 34: ...onitor Address bits 31 16 2 7 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 LMON_AD 31 16 Fig 33 Location Monitor Address Low register 2 13 31 Location Monitor Control register Base Address 0x2C D16 read writ...

Страница 35: ...The Mod A2818 is a 32 bit 33 MHz PCI Bus card The Mod A3818 is a PCI Express v1 1 or higher Bus card compatible with x8 and x16 PCI Express slot 3 2 Power requirements Board V2718 A2818 A3818 Power s...

Страница 36: ...M0 AM1 AM2 AM3 AM4 AM5 IRQ1 IRQ2 IRQ3 IRQ7 BRQ IRQ4 IRQ5 IRQ6 DTK BERR BGR SRES LWRD DS0 DS1 AS IACK WR O U T 1 AS 2 DTK 3 BERR 0 1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A1...

Страница 37: ...standard NIM TTL signals dip switch selectable 50 impedance 3 4 2 V2718 buttons SYSRES pushbutton Long touch 2 s for SYSRES generation Short touch for Manual START of Pulsers see 3 6 1 3 4 3 A2818 co...

Страница 38: ...orces the System Controller to be enabled regardless the 1st Slot detection ON SYSTEM CONTROLLER enabled OFF don t care PROG_1 Type DIP switch Function Forces the System Controller to be disabled rega...

Страница 39: ...11 DOC 79 39 Fig 37 PROG_3 Switch setting PROG_4 Type DIP switch Function not used I O Type DIP switch Function it allows the selection between NIM and TTL I O signals RIGHT TTL LEFT NIM Refer to Fig...

Страница 40: ...A2818 is supplied by the PCI bus one jumper on the A2818 allows to select the power supply 3 3V or 5V if you are using a 5V PCI bus then jumper position must be 1 2 if you are using a 3 3V PCI bus th...

Страница 41: ...eral functions default setting of the output signals is DS either DS0 or DS1 AS DTACK BERR LMON output of Location Monitor All the siganls whose detailed description is reported in 2 may be connected...

Страница 42: ...ND_CNT_PULSE every 1024 hits each time ZERO is met the scaler can be halt via the RESET input If END_COUNT_LIMIT N N 0 the scaler counts up to N hits then produces END_CNT_PULSE if AUTORES is enabled...

Страница 43: ...OUTPB TB WB NB RNGB 0 1 IMX 11 OR 5 HIT RES SCALER END_CNT PULSE END_CNT LIMIT AUTORES 0 1 IMX 10 0 1 IMX 9 OR 4 GATE 00 01 10 11 OR 6 OMX 1 0 0 1 OMX 10 O0 DS LOC MON VMON LMADL LMADH LMC AD AM WRIT...

Страница 44: ...40 Dataway Display layout The V2718 is provided with a 88 LED Dataway Display such LEDs report the VME Bus status address data and control lines related to the latest cycle ADDR 31 0 AM 5 0 IACK WRIT...

Страница 45: ...LED turns on if the cycle just executed was terminated with a DTACK asserted by a slave it remains on until the next cycle BERR This LED turns on if the cycle just executed was terminated with a BERR...

Страница 46: ...through the two on board dedicated switches The latest update of the V2718 firmware file is free downloadable from CAEN website in the V2718 web page Login required It is a zipped package including t...

Страница 47: ...rmware view The VME Board number parameter refers to the position of the V2718 in the CONET network and ranges from 0 to 7 as shown the following picture Fig 43 VME Index in the CONET network the PCI...

Страница 48: ...g recovering procedure as first attempt Power off the crate and extract the V2718 Set the dedicated jumper on the A2719 to the BKP position Insert the V2718 in the crate and power on Use CAENUpgrader...

Страница 49: ...l link protocol 80 MByte s using the CONET2 new optical link protocol Addressing A16 A24 A32 CR CSR LCK ADO ADOH cycles Data cycles D08 D16 D32 for R W and RMW D16 D32 for BLT D64 for MBLT Interrupt c...

Страница 50: ...tory 4 1 1 Software User Interface Installation The following instructions will help through the module installation the package includes V2718 VME Board A2818 PCI Board Software Documentation Pack CD...

Страница 51: ...V supplied see 3 5 2 of the PC motherboard 2 Connect the TX connector of the A2818 to the RX connector of the first V2718 of the CONET network via the optical fiber cable 3 If you are using I type ca...

Страница 52: ...a width are selected the User has to write the address where the cycle must be performed and the eventual datum to be written then the VME Operation buttons allows to select the desired cycle The oper...

Страница 53: ...ME Settings 4 1 5 Software User Interface I O Setting Menu Pulser The Pulser Setting Menu allows to perform the settings of the V2718 built in pulsers see 3 7 The V2718 features two internal pulsers P...

Страница 54: ...eset signals can be sent either on the unused input connector or software generated an End_Count_Pulse is eventually available on Out_4 The End_Count field allows to set the number of hits to be store...

Страница 55: ...and 2 13 15 Fig 51 The I O Setting Menu Input 4 1 9 Software User Interface I O Setting Menu Output The Output Setting Menu allows to set the polarity of Output 0 4 and of the relevant LEDs as well as...

Страница 56: ...CAENVMELib is a set of ANSI C functions which permits an user program the use and the configuration of the V2718 The present description refers to CAENVMELib Rel 1 x available in the following formats...

Страница 57: ...st be specified only the module index BdNum because the link is PCI CAENVME_API CAENVME_Init CVBoardTypes BdType short Link short BdNum long Handle 4 3 3 CAENVME_BoardFWRelease Parameters in Handle Th...

Страница 58: ...n Description The function performs a single VME read cycle CAENVME_API CAENVME_ReadCycle long Handle unsigned long Address void Data CVAddressModifier AM CVDataWidth DW 4 3 6 CAENVME_MultiRead Parame...

Страница 59: ...performs a Read Modify Write cycle The Data parameter is bidirectional it is used to write the value to the VME bus and to return the value read CAENVME_API CAENVME_RMWCycle long Handle unsigned long...

Страница 60: ...E write cycles CAENVME_API CAENVME_ReadCycle long Handle unsigned long Address void Data CVAddressModifier AM CVDataWidth DW 4 3 10 CAENVME_BLTReadCycle Parameters in Handle The handle that identifies...

Страница 61: ...ME multiplexed block transfer read cycle CAENVME_API CAENVME_MBLTReadCycle long Handle unsigned long Address unsigned char Buffer int Size CVAddressModifier AM int count 4 3 12 CAENVME_BLTWriteCycle P...

Страница 62: ...LTWriteCycle long Handle unsigned long Address unsigned char Buffer int size CVAddressModifier AM int count 4 3 14 CAENVME_ADOCycle Parameters in Handle The handle that identifies the device in Addres...

Страница 63: ...se burst see CVIOSources enum in Reset The source signal to stop the pulse burst see CVIOSources enum Returns An error code about the execution of the function Description The function permits to conf...

Страница 64: ...for the gate see CVIOSources enum in Reset The source signal to stop the counter see CVIOSources enum Returns An error code about the execution of the function Description The function permits to con...

Страница 65: ...ing table Table 4 1 Source selection S O U R C E S E L E C T I O N cvVMESignals cvCoincidence cvMiscSignals cvManualSW OUTPUT 0 DS Input Coinc Pulser A Manual SW 1 AS Input Coinc Pulser A Manual SW 2...

Страница 66: ...de about the execution of the function Description The function permits to read the configuration of the pulsers CAENVME_API CAENVME_GetPulserConf long Handle CVPulserSelect PulSel unsigned char Perio...

Страница 67: ...ol CVIOSources Source 4 3 23 CAENVME_ReadRegister Parameters in Handle The handle that identifies the device in Reg The internal register to read see CVRegisters enum out Data The data read from the m...

Страница 68: ...s in Handle The handle that identifies the device in Mask The lines to be pulsed Returns An error code about the execution of the function Description The function produces a pulse on the specified li...

Страница 69: ...alue 4 3 29 CAENVME_SetRequesterType Parameters in Handle The handle that identifies the device in Value The type of VME bus requester to implement see CVRequesterTypes enum Returns An error code abou...

Страница 70: ...Levels Value 4 3 32 CAENVME_SetTimeout Parameters in Handle The handle that identifies the device in Value Value of VME bus timeout to set see CVVMETimeouts enum Returns An error code about the execut...

Страница 71: ...ue 4 3 35 CAENVME_GetRequesterType Parameters in Handle The handle that identifies the device out Value The type of VME bus requester implemented see CVRequesterTypes enum Returns An error code about...

Страница 72: ...andle CVBusReqLevels Value 4 3 38 CAENVME_GetTimeout Parameters in Handle The handle that identifies the device out Value The value of VME bus timeout see CVVMETimeouts enum Returns An error code abou...

Страница 73: ...em reset on the module CAENVME_API CAENVME_SystemReset long Handle 4 3 41 CAENVME_ResetScalerCount Parameters in Handle The handle that identifies the device Returns An error code about the execution...

Страница 74: ...he device in PulSel The pulser to configure see CVPulserSelect enum Returns An error code about the execution of the function Description The function starts the generation of the pulse burst if the s...

Страница 75: ..._API CAENVME_IACKCycle long Handle CVIRQLevels Level void Vector CVDataWidth DW 4 3 47 CAENVME_IRQCheck Parameters in Handle The handle that identifies the device out Mask A bit mask indicating the ac...

Страница 76: ...ers in Handle The handle that identifies the device in Mask A bit mask indicating the IRQ lines in Timeout Timeout in milliseconds Returns An error code about the execution of the function Description...

Страница 77: ...Parameters in Handle The handle that identifies the device in InSel The input line to configure see CVInputSelect enum in InPol The input line polarity see CVIOPolarity enum in LEDPol The output LED...

Страница 78: ...VAddressModifier Am short Write short Lword short Iack 4 3 55 CAENVME_WriteRegister Parameters in Handle The handle that identifies the device in Reg The internal register to read see CVRegisters enum...

Страница 79: ...O Filename Number of pages Page 00106 03 V2718 MUTx 11 V2718_REV11 DOC 79 79 5 Technical Support CAEN makes available the technical support of its specialists at the e mail addresses below support nuc...

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