BONMET SDL10A, Руководство пользователя

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The CRC is started by first preloading a 16–bit register to all 1‘s. Then a process begins of applying successive
8–bit bytes of the message to the current contents of the register. Only the eight bits of data in each character are
used for generating the CRC. Start and stop bits, and the parity bit, do not apply to the CRC.
During generation of the CRC, each 8–bit character is exclusive ORed with the register contents. Then the result
is shifted in the direction of the least significant bit (LSB), with a zero filled into the most significant bit (MSB)
position. The LSB is extracted and examined. If the LSB was a 1, the register is then exclusive ORed with a preset,
fixed value. If the LSB was a 0, no exclusive OR takes place.
This process is repeated until eight shifts have been performed. After the last (eighth) shift, the next 8–bit byte is
exclusive ORed with the register‘s current value, and the process repeats for eight more shifts as described above.
The final contents of the register, after all the bytes of the message have been applied, is the CRC value.
When the CRC is appended to the message, the low-order byte is appended first, followed by the high-order byte.
In ladder logic, the CKSM function calculates a CRC from the message contents. For applications using host
computers, a detailed example of CRC generation is contained in Appendix C.
6.1.4Communication Parameter Write-in and Read-out
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03 (0x03) Read Holding Registers
Description
Reads the binary contents of holding registers (4X references) in the slave.Broadcast is not supported.Appendix B
lists the maximum parameters supported by various controller models.
Query
The query message specifies the starting register and quantity of registers to be read. Registers are addressed
starting at zero: registers 1–16 are addressed as 0–15.
Here is an example of a request to read registers 40108–40110 from slave device 17:
QUERY
Example
Field Name (Hex)
Slave Address 11
Function 03
Starting Address Hi 00
Starting Address Lo 6B
No. of Points Hi 00
No. of Points Lo 03
Error Check (CRC)
––
Response
The register data in the response message are packed as two bytes per register, with the binary contents right
justified within each byte. For each register, the first byte contains the high order bits and the second contains the
low order bits.
Data is scanned in the slave at the rate of 125 registers per scan for 984–X8X controllers (984–685, etc), and at
the rate of 32 registers per scan for all other controllers. The response is returned when the data is completely