:CLOCk:PLL:BANDwidth
Syntax:
:CLOCk:PLL:BANDwidth <LOW|HIGH>
The PLL bandwidth can be set to either high or low. A high PLL bandwidth is recommended when
low-frequency variations of the external reference clock must be tracked (e.g. SSC, which is typically
modulated with 33 kHz). A low PLL bandwidth is recommended if minimum clock jitter is desired.
Example command:
CLOC:PLL:BAND LOW
:CLOCk:PLL:BANDwidth?
Syntax:
:CLOCk:PLL:BANDwidth?
Queries the current state of the PLL bandwidth.
Example query:
CLOC:PLL:BAND?
Example response:
LOW
:CLOCk:MULTiplier
Syntax:
:CLOCk:MULTiplier <multiplier>
This parameter defines the factor the external reference clock is multiplied with.
Note that you must still provide the target frequency (using the
:CLOCk:FREQency
command);
thus, the external reference clock frequency is implicitly defined by the system frequency, divided by
the multiplier, multiplied by the divider (see
:CLOCk:DIVider
).
When the internal reference clock is selected, this parameter has no effect.
Example command:
CLOC:MULT 10
:CLOCk:DIVider
Syntax:
:CLOCk:DIVider <multiplier>
This parameter defines the divisor the external reference clock is divided by.
Note that you must still provide the target frequency (using the
:CLOCk:FREQency
command);
thus, the external reference clock frequency is implicitly defined by the system frequency, multiplied
by the divider, divided by the multiplier (see
:CLOCk:MULTiplier
).
When the internal reference clock is selected, this parameter has no effect.
Example command:
CLOC:DIV 10
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