21
Figure 5.1, BL 10000 series block diagram
5.3
CONTROL CHASSIS
5.3.1
The control chassis contains the main power invertors, bias, and control circuitry. The diagram of Figure
1 depicts the basic functional blocks. Note that in the case of the three phase units, only one phase is illustrated
as the others are identical. The circuitry is configured so that each of the three "Phase Control Cards" plug into
a "Motherboard". The output devices and output filter components are mounted on separate assemblies.
5.3.2
Bias power for the control chassis is derived from the +250 Vdc rail. This voltage is applied to the
Motherboard. All other operating voltages are provided by the Motherboard.
5.4
MOTHERBOARD
5.4.1
The Motherboard uses a fly-back type inverter to provide the following low voltage supplies.
a.
+/-15 Vdc for analog circuits
b.
+5 Vdc for metering circuits
c.
+12 Vdc for fans and relays
d.
isolated supplies for IGBT drivers
A quick indication of the supply status is provided by LEDS connected to each supply output.
5.4.2
The variable frequency 45 to 500 Hertz square-wave is generated on the Motherboard. A CMOS phase
locked loop (U5), and 8 bit counter (U6) and Voltage Controlled Oscillator (U7) are the basis for the square-wave
generator. The front panel frequency control sets a DC voltage which determines the frequency of the VCO. The
VCO generates a square-wave at a frequency between 45 and 500 Hertz. This square-wave is used as a
reference signal for the PLL. The frequency of the VCO is multiplied by a factor of 256 by the PLL. The resultant
is used as a clock signal for the 8 bit counter.
5.4.3
In order to produce data in the form of a sine-wave, a "Look-up" table is stored in a PROM on each phase
control card. The outputs of the 8 bit counter are tied to the address lines of each PROM. As the clock runs, the
data in the PROMS are clocked into the D/A convertors. This action produces a series of steps at the output of
the D/A convertor that approximate a sine-wave. Further filtering produces a clean sine-wave at the frequency
of the VCO. Phase displacement is determined by the PROM data.
5.4.4
The mother board also produces a triangle-wave signal that is common to the PWM modulators
contained on the phase control cards discussed later.
5.4.5
All inter-connection between circuits and controls are provided via the Motherboard. Four 22 pin card
edge connectors are present for the installation of 3 phase control cards and a GPIB interface card. Distribution
of all low voltage supplies is via the Motherboard.
5.5
OUTPUT INVERTER
5.5.1
The 2 output inverters are based on a half bridge topology. A 600 volt, 100 amp, IGBT module is
connected between the +/-250 Vdc rails. The drive signal to the inverter is a "sine weighted" Pulse Width
Modulated (PWM), isolated rectangular pulse train. The output of the half bridge is a 20 Khz pulse train that
swings 500 volts peak-to-peak and has a varying duty cycle based on the modulating signal (sine-wave
generator). This output is filtered by a low pass network. The result is a sine-wave voltage that is an amplified
version of the sine-wave signal.
5.5.2
Pulse Width Modulation is performed by the individual phase control cards. The tri-wave signal
generated by the Motherboard is distributed to each phase control card. Components U7, U12, U13, and U14
form a modulator circuit that provides a dual polarity PWM signal that is applied to optically-coupled driver IC's
U17 and U18. These driver IC's provide boosted, isolated, drive for the upper and lower IGBT of the output
invertor. The two inputs to the modulator are the 20 KHz tri-wave and the locally generated sine-wave.
5.5.3
The driver IC's provide short circuit protection via an isolated fault output. This circuit detects the VCE
voltage of the upper and lower IGBT. If the output of the inverter is shorted the IGBT's collector to the emitter
voltage will increase and trigger the short circuit detection. The fault detect signal is used to set a latching lock
out that turns off the PWM drive signals. The latch logic is comprised of U9, U10, U12 on the Motherboard. The
latch must be reset by cycling power.
Содержание BL10000 Series
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