Beckhoff KL85 Series, Документация

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Data structures of the modules
KL85xx und KL9309 76 Version: 2.1.0
• switch position 1 to switch position 2
• Fast switching from 0 to 2 always takes place via switch position 1 and therefore also starts the delay
time.
Examples:
• Output 1 switches on immediately when the three-stage switch is switched from 0 to 1.
• The delay time starts when the three-stage switch is switched from 1 to 2. Output 1 remains switched
on as long as the delay time is running. Output 2 is additionally switched on when the delay time
expires.
• The switching back of the three-stage switch from 2 to 1 takes place immediately. Output 2 switches
off, output 1 remains switched on.
• Switching from 1 or 2 to 0 takes place immediately. Both outputs are switched off immediately.
• The delay time starts again if the switch is switched from 1 to 2 when the delay time is running.
R38: Output mode / switch-on delay for channel 2
See register 37.
R39: Output mode / switch-on delay for channel 3
See register 37.
R40: Output mode / switch-on delay for channel 4
See register 37.
5.3 KL8528
5.3.1 KL8528 – Process image
The KL8528 is represented in the process image with 6 bytes each of input and output data. These are
organized as follows:
Byte offset Format Input data Output data
0 Byte
Status byte ( SB [ } 78] ), for register
communication only
Control byte ( CB [ } 78] ), for
register communication only
1 Byte Data byte 1 (auto/manual for output 1 to 8) Data byte 1 (sets output 1 to 8)*
2 Byte Data byte 2 (switch position for output 1 to 8) Data byte 2 (reserved)
3 Byte reserved Data byte 3 (sets LED 1 to 8
green)
4 Byte reserved Data byte 4 (sets LED 1 to 8
yellow)
5 Byte reserved reserved
*) If the respective switch is set to auto.
Control and status byte
See chapter Control and status byte [
}
78]